Semiconductor Memory Device Repeater Placement for Area and Power Reduction
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Solution Overview
Problem
In semiconductor memory devices, particularly in mobile terminals, the layout and operation of address, command, and data pads at peripheral regions lead to inefficiencies in data transfer and amplification, resulting in increased power consumption and layout area requirements.
Innovation Solution
The semiconductor memory device is configured with core regions and cell blocks along reference lines, featuring repeaters and control circuit units that amplify and transfer data through global and local input/output lines, optimizing data processing and reducing unnecessary signal amplification across all core regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repeaters are positioned to amplify data for all cell blocks, then data transfer reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by positioning repeaters selectively only in the second core region rather than uniformly across all core regions. The repeater is placed specifically where data signals need amplification for cell blocks in the second core region, while omitting unnecessary repeaters in the first core region. This localized approach ensures reliable data transfer where needed while reducing power consumption by avoiding unnecessary amplification operations in regions where signals are already sufficient.
2Reliability
If repeaters are positioned to amplify data for all cell blocks, then data transfer reliability is improved, but layout area increases
Solution Approach 1:
The patent implements local quality by strategically placing the repeater only in the second core region where data amplification is necessary, rather than distributing repeaters across all core regions. This selective placement reduces the overall layout area occupied by repeaters while maintaining data transfer reliability for the cell blocks that require amplification. The first core region operates without repeaters, utilizing the existing signal strength from the first global input/output line.
3Productivity
If repeaters operate for all cell blocks, then data transfer efficiency is improved, but unnecessary signal amplification increases power consumption
Solution Approach 1:
The patent applies partial action by implementing repeater operation only for the specific case where data needs amplification in the second core region, rather than providing universal amplification for all cell blocks. The repeater is activated selectively based on the operational requirements of different core regions, avoiding excessive or unnecessary amplification actions in the first core region where signals are already sufficiently strong, thereby reducing wasted energy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces power consumption and layout area by limiting repeater operation to specific core regions, enhancing data transfer efficiency and minimizing unnecessary signal gain, thereby optimizing the semiconductor memory device's performance.
Implementation Method 1
a repeater positioned between the third and fourth cell blocks, and configured to receive data outputted from the first cell block or the second cell block, through a first global input/output line in a read operation for the first cell block or the second cell block, amplify the received data and transfer the amplified data to a second global input/output line
Data Source
AI summary
A semiconductor memory device includes a first core region and a second core region disposed along a first reference line parallel to a major axis, the first reference line connecting an input pad and an output pad; first and second cell blocks disposed in the first core region along the first reference line; third and fourth cell blocks disposed in the second core region along the first reference line; and a repeater positioned between the third and fourth cell blocks, and configured to receive data outputted from the first cell block or the second cell block, amplify the received data and transfer the amplified data to a second global input/output line. Reducing the number of needed global input/output lines leads to layout area reduction. Moreover, since repeaters are driven in read operations for a limited number of cell blocks, signal gain may be reduced, thus reducing overall power consumption.