Semiconductor Memory Device Peripheral Resistive Body Integration
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Solution Overview
Problem
Current semiconductor memory devices face challenges in maximizing memory capacity and reducing manufacturing costs, particularly in optimizing the layout and formation process of peripheral circuits to effectively utilize chip surface space.
Innovation Solution
The semiconductor memory device incorporates a resistive body made of conductive semiconductor material, strategically positioned in the peripheral area around the memory cell array, using insulating layers to enhance chip surface utilization and integrate resistive elements without additional processing steps, thereby optimizing memory capacity and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If peripheral circuits are formed using conventional processes, then the circuits can be manufactured, but the chip surface utilization is reduced and manufacturing costs increase
Solution Approach 1:
The patent merges the formation of resistive bodies with the existing peripheral circuit manufacturing process. The resistive bodies are formed using the same semiconductor layer formation steps as the peripheral circuit transistors, combining two functions into a single integrated process flow, thereby improving chip surface utilization without significantly increasing manufacturing complexity
Solution Approach 2:
The semiconductor layer serves multiple functions: it forms both the active transistors in the peripheral circuits and the resistive bodies in the same manufacturing process. This multi-functionality allows the same process steps to create different circuit elements, optimizing chip space and reducing the need for separate processing lines
2Adaptability or versatility
If additional processing steps are used to form resistive elements, then the resistive elements can be created, but the manufacturing process complexity increases
Solution Approach 1:
The formation of resistive bodies is merged with the peripheral circuit transistor formation process. Both structures are created using the same sequence of steps: forming the semiconductor layer, patterning, and thermal treatment, thereby achieving resistive element integration without adding process complexity
Solution Approach 2:
The same manufacturing process steps that create the peripheral circuit transistors automatically create the resistive bodies as well. The process is self-sufficient, using the same materials and conditions to produce both active devices and passive resistive elements without requiring additional specialized processing
3Reliability
If thermal treatment is applied to form resistive bodies, then the resistive properties are achieved, but thermal treatment-related issues occur
Solution Approach 1:
The patent uses parameter changes in the thermal treatment process to achieve resistive body formation. By controlling temperature, time, and atmospheric conditions during the thermal treatment step, the process achieves reliable resistive properties while minimizing harmful thermal effects through optimized parameter selection
Data Source
AI summary
A semiconductor memory device includes a plurality of first electrode layers stacked in a first direction; a semiconductor layer extending in the first direction in the plurality of first electrode layers; a first insulating layer extending in the first direction along the semiconductor layer between the semiconductor layer and each of the plurality of first electrode layers; a second insulating layer covering the periphery of the plurality of first electrode layers; a resistive body provided on the second insulating layer; and a third insulating layer provided between the resistive body and the second insulating layer, the third insulating layer including the same material as the material of the first insulating layer.