Memory Row Clear Command Using Internal Data Patterns
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices require multiple external write commands to clear a portion of a memory array, which occupies the command/address and data bus for an extended period, consumes significant power, and prolongs operation time.
Innovation Solution
Implementing a single row clear command within the memory device that uses internally stored data patterns to clear memory cells, reducing the need for external data transmission and minimizing bus occupancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple external write commands are used to clear memory cells, then the memory cells can be cleared, but the command/address and data bus are occupied for an extended period
Solution Approach 1:
The patent extracts the data pattern storage function from external sources into the memory device itself by utilizing unused portions of existing memory cells to store clear data patterns. This eliminates the need for external data bus transmissions during row clearing operations, thereby reducing bus occupancy time while maintaining complete memory clearing capability.
Solution Approach 2:
The patent performs preliminary action by pre-storing clear data patterns (such as all-ones or all-zeros patterns) in designated memory cells before the row clearing operation is needed. When a row clear command is received, the pre-stored patterns are immediately used to clear the target row, eliminating the time required for external data transmission and processing.
2Reliability
If multiple external write commands are used to clear memory cells, then the memory cells can be cleared, but significant power is consumed
Solution Approach 1:
The patent extracts the data pattern storage function from external sources into the memory device itself by utilizing unused portions of existing memory cells to store clear data patterns. This eliminates the need for external data bus transmissions during row clearing operations, thereby reducing bus occupancy time while maintaining complete memory clearing capability.
Solution Approach 2:
The memory device serves itself by internally storing and utilizing clear data patterns from its own memory resources rather than relying on external data input. This self-service approach reduces external interface activity and associated power consumption while maintaining the ability to completely clear memory rows.
3Reliability
If multiple external write commands are used to clear memory cells, then the memory cells can be cleared, but the operation time is prolonged
Solution Approach 1:
The patent extracts the data pattern storage function from external sources into the memory device itself by utilizing unused portions of existing memory cells to store clear data patterns. This eliminates the need for external data bus transmissions during row clearing operations, thereby reducing bus occupancy time while maintaining complete memory clearing capability.
Solution Approach 2:
The patent performs preliminary action by pre-storing clear data patterns (such as all-ones or all-zeros patterns) in designated memory cells before the row clearing operation is needed. When a row clear command is received, the pre-stored patterns are immediately used to clear the target row, eliminating the time required for external data transmission and processing.
Data Source
AI summary
Memory devices, systems including memory devices, and methods of operating memory devices are described, in which memory devices are configured to provide row clear features. In some embodiments, the memory device may receive a command from a host device directed to a row of a memory array included in the memory device. The memory device may determine that the command is directed to two or more columns associated with the row, where each column is coupled with a group of memory cells. The memory device may activate the row to write the two or more columns using a set of predetermined data stored in a register of the memory device. Subsequently, the memory device may deactivate the word line based on writing the set of predetermined data to the two or more columns.


