Memory Row Error Scrub Registers for Faster ECC Reliability
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in ensuring high fidelity of information readout due to errors in memory cells, which are not effectively addressed by current error correction methods.
Innovation Solution
Implementing a per-row error scrub (pRECS) mechanism that collects and stores granular error information for each row in the memory array, allowing for more detailed error correction and maintenance by updating per-row ECS registers during error correction and scrub (ECS) cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction circuits scan every memory cell periodically to correct errors, then data fidelity is maintained, but the complexity of the error correction system increases and time is consumed
Solution Approach 1:
The patent segments the error correction process by introducing per-row error scrub (pRECS) information that tracks errors at the row level rather than individually at the cell level. This segmentation allows the system to manage and correct errors more efficiently by organizing correction operations row-by-row, reducing the overall complexity of tracking and correcting errors across the entire memory array.
Solution Approach 2:
The patent implements feedback mechanisms through pRECS information that is written back to memory cells after error correction operations. This feedback loop allows the system to learn from previous error patterns and adjust correction strategies, thereby maintaining data fidelity while reducing the complexity of continuous full-array scanning.
2Measurement precision
If per-row error scrub information is collected and stored for each row, then error correction accuracy is improved, but the quantity of data to be processed and stored increases
Solution Approach 1:
The patent extracts only the essential error information at the row level using pRECS, rather than storing detailed error data for every individual cell. By taking out and storing only the per-row error scrub information, the system achieves improved error correction accuracy while minimizing the quantity of data that needs to be processed and stored.
Solution Approach 2:
The patent applies local quality by storing error information at the row level rather than uniformly at the cell level. This allows the system to maintain high error correction accuracy for each row while reducing the overall data volume, as each row's error characteristics are captured independently without redundant detailed information.
3Reliability
If error correction circuits scan every memory cell periodically, then all errors are corrected, but the time required for correction increases
Solution Approach 1:
The patent segments the error correction process into row-based operations using pRECS information. Instead of scanning every cell sequentially across the entire array, the system can efficiently process errors row-by-row, significantly reducing the time required for complete error correction while maintaining correction completeness.
Solution Approach 2:
The patent implements preliminary action by collecting and storing pRECS information during normal memory operations before dedicated error correction cycles. This allows the system to have error information ready in advance, enabling faster correction operations and reducing the overall time required to scan and correct all memory cells.
Data Source
AI summary
Apparatuses, systems, and methods for per row error correct and scrub (pRECS) information. There may be pRECS information associated with each row, and it may reflect a number of codewords stored along that row which were determined to include an error during error correct and scrub (ECS) operations. The memory may store the pRECS information in the memory array, for example, each row may store the pRECS information associated with that row.