Post-Packaging Memory Row Repair Trumping Mechanism
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Solution Overview
Problem
Existing post-packaging repair methods for memory devices, such as hard post-packaging repair (HPPR), face delays and improper function due to the need to override non-volatile storage, which can lead to unintentional activation of multiple data rows.
Innovation Solution
Implementing a system that allows HPPR of redundant rows by trumping HPPR addresses stored in non-volatile memory, using a logic mechanism that prioritizes HPPR and soft post-packaging repair (SPPR) addresses to prevent such delays and improper function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If HPPR methods override non-volatile storage to repair memory rows, then repair functionality is achieved, but substantial delays and improper activation of multiple data rows occur
Solution Approach 1:
The patent segments the repair address storage into two distinct parts: non-volatile storage (for permanent repair addresses) and volatile storage (for temporary override addresses). This segmentation allows the system to maintain both HPPR and SPPR functionality simultaneously without interference, enabling fast repair operations without the delays previously caused by overriding non-volatile storage.
Solution Approach 2:
The patent introduces volatile storage as an intermediary between the external repair interface and the non-volatile storage. This intermediary allows repair addresses to be temporarily held and processed without directly modifying the non-volatile storage, thereby eliminating the substantial delays associated with overriding permanent storage while still achieving the repair functionality.
2Reliability
If HPPR methods override non-volatile storage, then repair addresses are updated, but multiple data rows may be unintentionally activated
Solution Approach 1:
By segmenting the address storage system into non-volatile and volatile components, the patent ensures that only one repair address is active at any given time. The volatile storage holds the currently active repair address, preventing the simultaneous activation of multiple data rows that occurs when non-volatile storage is directly overridden.
Solution Approach 2:
The patent performs preliminary action by storing repair addresses in volatile storage before they become active. This preliminary staging allows the system to prepare repair addresses without immediately activating them, thereby preventing improper activation of multiple data rows while maintaining the ability to update repair addresses as needed.
Data Source
AI summary
Systems and methods to perform post-packaging repair of previously repaired data groups are disclosed. The devices may have an array of addressable rows or columns of memory cells, which can be activated. Upon identification of defect in a memory cell row or column, a repair in which the memory cell may be deactivated and a secondary row may be activated in its place may be performed. Volatile and non-volatile storage elements may be used to store the defective memory addresses. Logic circuitry in the device may match a requested address with the stored addresses and generate logic signals that trigger activation of a repaired row in place of the defective row or column. Moreover, defective rows or columns that have been previously repaired once may be further repaired. To that end, logic circuitry implementing a trumping mechanism may be used to prevent activation of multiple data rows or columns for addresses that were repaired multiple times.