Memory Block Scan Scheduling for Faster Error-Correcting Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Storage devices experience performance degradation due to frequent scan operations performed to detect and correct errors, which can lead to delayed processing of host commands and increased likelihood of uncorrectable error correction codes.
Innovation Solution
Implementing a method that differentially applies scan operation priority and period based on the number of error bits detected during data read operations, assigning memory blocks to scan trigger groups with varying trigger periods to minimize unnecessary scans and reduce uncorrectable errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If scan operations are performed frequently to detect and correct errors in advance, then reliability of the storage device is improved, but processing speed of host commands deteriorates
Solution Approach 1:
The patent applies local quality by differentiating scan operation frequencies based on memory block characteristics. Memory blocks are classified into multiple groups (first group with higher error probability, second group with lower error probability) and each group undergoes scan operations at different frequencies. This ensures that reliability is maintained for high-risk blocks while reducing unnecessary scans for low-risk blocks, thereby improving overall command processing speed.
Solution Approach 2:
The patent implements dynamics by making the scan operation period adjustable and adaptive. The controller dynamically changes the scan period for different memory block groups based on their error characteristics. The first memory block group has a shorter scan period while the second group has a longer scan period, allowing the system to adapt scan frequency to actual memory conditions rather than using a fixed uniform schedule.
2Ease of operation
If uniform scan period is applied to all memory blocks, then ease of control is improved, but productivity deteriorates due to unnecessary scan operations
Solution Approach 1:
The patent applies segmentation by dividing all memory blocks into multiple groups based on their error characteristics. The memory blocks are segmented into a first group (with higher error probability) and a second group (with lower error probability). This segmentation allows the controller to apply different scan periods to different groups, reducing unnecessary scan operations in the second group and improving overall productivity while maintaining manageable control through group-based classification.
3Measurement precision
If scan operations are performed on all memory blocks at high frequency, then detection precision of errors is improved, but loss of time increases due to delayed command processing
Solution Approach 1:
The patent applies local quality by tailoring error detection frequency to the actual error characteristics of each memory block group. The first memory block group, which has higher error probability, undergoes more frequent scan operations to maintain high detection precision. The second memory block group, with lower error probability, undergoes less frequent scans, reducing time loss from unnecessary operations while maintaining adequate detection capability for its risk level.
Data Source
AI summary
Disclosed is a storage device capable of improving performance by changing a period of a scan operation, and an operating method of the same. The storage device may include a memory including a plurality of memory blocks and a controller configured to set a plurality of scan trigger groups having different scan trigger periods, perform a scan operation on the plurality of memory blocks, assign each of the plurality of memory blocks to one of the plurality of scan trigger groups based on the number of bit errors included in data read by each of the memory blocks, and set different scan trigger periods for the memory blocks based on the scan trigger group to which each of the memory blocks belongs.