Memory Block Family Scan Scheduling for Voltage Shift Control
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Solution Overview
Problem
Existing memory systems fail to adequately address the temporal voltage shift caused by slow charge loss in memory cells, leading to increased bit error rates and inefficiencies in read operations.
Innovation Solution
Implementing block family-based error avoidance strategies that update voltage bin offsets in a timely manner and combine block families based on predefined conditions to minimize bit error rates and manage the number of block families, while optimizing scan processes to maintain performance and quality of service.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If block families are scanned and managed individually, then measurement precision of voltage shifts is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple block families into block family groups, where a single scan operation can manage multiple blocks simultaneously. This grouping approach maintains the precision needed for voltage shift measurement while reducing the overall complexity of scan management by handling blocks in consolidated groups rather than individually.
2Reliability
If the number of block families is increased to improve error avoidance, then reliability improves, but device complexity increases
Solution Approach 1:
The patent merges block families into block family groups based on voltage bin characteristics, allowing the system to maintain high reliability through comprehensive error avoidance while managing complexity by organizing blocks into consolidated groups that can be scanned and managed together rather than as separate entities.
Solution Approach 2:
The patent changes the organizational parameter from individual block families to block family groups defined by voltage bin characteristics. This parameter change allows the system to maintain detailed tracking for reliability while simplifying management through the group structure, where blocks are organized by their voltage characteristics rather than individually.
3Reliability
If scan operations are performed frequently to maintain read levels, then reliability improves, but loss of time increases
Solution Approach 1:
The patent combines multiple block family scans into a single scan operation that processes multiple blocks simultaneously. This merging approach maintains reliability by continuing to scan blocks regularly to maintain accurate read levels, while reducing the time overhead by performing consolidated scans rather than separate scans for each block family.
Solution Approach 2:
The patent implements periodic scan operations on block family groups, where scans are performed at regular intervals rather than continuously or individually for each block. This periodic approach maintains reliability by ensuring blocks are scanned frequently enough to maintain accurate read levels, while optimizing time usage by consolidating scan operations into periodic group scans.
Data Source
AI summary
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initiate a scan operation on a plurality of block families of the memory device. Each of the plurality of block families is assigned to a voltage offset bin of a plurality of voltage offset bins. The processing device further determines that a number of scan operations to be performed in one scan interval is greater than a maximum number of scan operations to be performed in a scan interval. The processing device further determines based on the voltage offset bins of the plurality of block families and a time elapsed since execution of a previous scan operation of the plurality of block families, a scan priority of each of the plurality of block families, and schedules, based on the scan priority, a scan operation of one or more block families of the plurality of block families during one or more subsequent scan intervals. Based on the scan result, two or the plurality of block families which are scanned within the same or different intervals can be combined and thus release block family memory if their measurement results satisfy combining criterion.