Semiconductor Memory Device With Segmented Drain Select Lines

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor memory devices approach their physical scaling limits, improving the degree of integration of memory cells while maintaining operational stability becomes a challenge, particularly in three-dimensional structures where the integration of two memory cell strings per hole leads to deteriorated operating characteristics.

Innovation Solution

The semiconductor memory device employs a configuration where multiple memory cell strings are arranged in a zigzag pattern with alternating activation of drain select lines and bit lines, allowing for independent control of memory cell strings to improve integration and stability, and operates two memory cell strings as a single unit when characteristics deteriorate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If two memory cell strings are included in one hole to improve degree of integration, then the degree of integration of memory cells is improved, but the operating characteristics of respective memory cells are deteriorated

Engineering Contradiction:
Improvedegree of integration of memory cellsVSAvoidoperating characteristics of memory cells
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory cell strings are divided into first and second groups that are separately controlled by first and second drain select lines, respectively. This segmentation allows independent control of each memory cell string, preventing interference between adjacent strings while maintaining high integration density with two strings per hole.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If memory cell strings are arranged in 3D structure to improve degree of integration, then scaling limit is overcome, but control complexity increases

Engineering Contradiction:
Improvedegree of integrationVSAvoidcontrol complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements dynamic control of memory cell strings by selectively activating different drain select lines (first or second) based on which string needs to be accessed. This dynamic switching mechanism simplifies the control logic compared to static multi-dimensional addressing, as only one drain select line needs to be active at a time despite having multiple strings per hole.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240290407A1Semiconductor memory device
Publication Date: 2024.08.29 SK HYNIX INC
  • US20240290407A1 patent drawing
  • US20240290407A1 patent drawing
  • US20240290407A1 patent drawing

AI summary

Provided herein may be a semiconductor memory device. The semiconductor memory device may include first holes arranged in a first direction to be spaced apart from each other by a first distance, a first drain select line coupled to first memory cell strings among first and second memory cell strings separated from each of the first holes, and a second drain select line coupled to the second memory cell strings. Identical data may be stored in the first and second memory cells coupled to a selected word line, among memory cells included in each of the first memory cell strings and memory cells included in each of the second memory cell strings.