3D Memory Select Line Voltage Control for Hot Electron Disturbance
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Solution Overview
Problem
Three-dimensional memory devices experience hot electron mode disturbance due to large electric fields between word lines, which negatively affects operations and performance, especially during read cycles.
Innovation Solution
Applying different gradually lowering signal line reference voltages to ground select lines and string select lines during the word line voltage lowering phase, corresponding to their positions, to prevent hot electron mode disturbance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If word line voltage is lowered after programming operations in three-dimensional memory device, then the programming operation is completed, but large electric field between word lines causes hot electron mode disturbance
Solution Approach 1:
The patent applies preliminary action by gradually lowering the voltage of select lines (ground select lines and string select lines) before and during the word line voltage lowering phase. This preemptive voltage reduction on select lines prevents the formation of large electric fields between adjacent word lines, thereby avoiding hot electron mode disturbance before it can occur during the word line voltage transition.
Solution Approach 2:
The patent employs parameter changes by dynamically adjusting the voltage levels of ground select lines and string select lines in a graded manner. Instead of maintaining fixed voltages, the select line voltages are progressively reduced to match the word line voltage transition, thereby controlling the electric field distribution and preventing hot electron generation through controlled parameter modification.
2Quantity of substance
If multiple word lines are programmed to high threshold voltage state, then programming capacity is increased, but electric field concentration between adjacent word lines increases causing disturbance
Solution Approach 1:
The patent applies local quality by implementing different voltage lowering strategies for different select lines based on their positions. Ground select lines and string select lines have their voltages gradually reduced in coordination with the word line voltage transitions, creating localized voltage control at each select line interface. This localized voltage management prevents electric field concentration at specific interfaces between programmed and erased word lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces voltage differences between word lines, eliminating hot electron mode disturbance and enhancing the operational performance of three-dimensional memory devices.
Implementation Method 1
The channel potentials may be capacitively coupled and down-boosted to negative voltages
Data Source
AI summary
A memory device and an operation method thereof are provided. The operation method includes: when a read operation or a write-verify operation is completed, during a word line voltage lowering phase, synchronously applying a plurality of different gradually lowering signal line reference voltages to a plurality of ground select lines and a plurality of string select lines, wherein values of the different gradually lowering signal line reference voltages are corresponding to a plurality of signal line positions of the ground select lines and the string select lines.


