Semiconductor Memory Select Line Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The program disturb phenomenon in semiconductor memory devices is not effectively addressed, leading to inefficiencies in data storage and retrieval due to slow read and write speeds of nonvolatile memory devices.
Innovation Solution
A semiconductor memory device that controls the drain select line voltage during program operations, using a first select line voltage for initial program states and a second, lower select line voltage for subsequent states to improve program efficiency and reduce disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a uniform select line voltage is applied during all program operations, then the program operation can be simplified, but program disturb phenomenon occurs affecting data reliability
Solution Approach 1:
The patent applies dynamic voltage control by changing the select line voltage level based on the program state. During initial program operations (first through m-th operations), a first select line voltage is applied, and during subsequent operations (n-th operation and later), a second select line voltage different from the first is applied. This dynamic adjustment resolves the contradiction by adapting the voltage control to the specific program stage, reducing program disturb while maintaining operational simplicity through automated control.
2Reliability
If nonvolatile memory devices are used for data storage, then data can be maintained without power, but read and write speeds are relatively slow
Solution Approach 1:
The patent changes the voltage parameter (select line voltage) during the program operation to optimize performance. By applying different voltage levels at different program stages, the invention improves program speed and reduces disturb effects, thereby addressing the speed limitation of nonvolatile memory devices while preserving their data retention capability through proper voltage management during programming.
3Adaptability or versatility
If program operation is performed on multiple program states, then data storage capacity increases, but program disturb phenomenon affects adjacent states
Solution Approach 1:
The patent applies preliminary anti-action by using a different select line voltage during later program operations (n-th operation and subsequent operations) compared to initial operations. This preventive measure counteracts the program disturb effect on adjacent memory cells and states before it can cause harmful effects, enabling reliable multi-state programming by protecting against interference between adjacent program states.
Data Source
AI summary
A semiconductor memory device includes a memory block including a plurality of memory cells programmed to a plurality of program states during a program operation, a voltage generator to generate and apply a program voltage and a select line voltage to the memory block during the program operation, and a read and write circuit to temporarily store program data during the program operation and control a potential of bit lines of the memory block based on the temporarily stored program data. The voltage generator generates the select line voltage as a first select line voltage during a first program operation on some program states among the plurality of program states, or as a second select line voltage for which a potential is lower than a potential of the first select line voltage during a second program operation on remaining program states among the plurality of program states.