Memory Self-Test Architecture Partitioning Data and Signatures
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Solution Overview
Problem
The existing memory testing technologies, such as Built-in Self-Test (BIST), consume excessive hardware resources and time due to the need for separate storage of data and compare signatures in ROMs, requiring additional digital circuitry and engineering changes for modifications.
Innovation Solution
A memory with a self-test function is partitioned into two storage blocks for storing data and compare signatures, allowing simultaneous modification and reducing testing time, costs, and hardware resource usage by allocating the second storage block to the last address of the memory unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate digital circuitry is used to store compare signature in advance, then the memory testing accuracy is improved, but the hardware resources are increased
Solution Approach 1:
The patent merges the compare signature storage function with the existing memory array by utilizing the second half of each memory word for storing compare signatures. This eliminates the need for separate digital circuitry while maintaining testing accuracy, as the memory structure itself serves dual purposes: storing test data and storing expected results for comparison.
Solution Approach 2:
The memory structure is designed to perform multiple functions: the first half of each memory word stores test data while the second half stores compare signatures. This multi-functional design allows the same hardware resource (memory array) to serve both data storage and reference signature storage, reducing overall hardware complexity.
2Reliability
If the compare signature is stored in separate digital circuitry, then the testing reliability is improved, but the engineering design time is increased
Solution Approach 1:
By combining the compare signature storage with the memory array structure, the patent eliminates the need for separate circuit design and verification. The compare signatures are stored in the same memory technology as the test data, simplifying the engineering design process while maintaining testing reliability through the same proven memory structure.
3Productivity
If compression technology is used to compress storage data to test signature, then the testing speed is improved, but the hardware resources are increased
Solution Approach 1:
The patent merges the compression function into the existing memory structure by using the second half of each memory word to store compressed compare signatures. This eliminates the need for separate compression circuitry while maintaining testing speed, as the compression is performed in-place within the memory array during normal operation.
Data Source
AI summary
The present invention relates to a memory with a self-test function and a method for testing the same. The memory comprises a testing unit, a memory unit, and a comparison module. The method for testing the memory comprises steps of the testing unit producing a pattern signal; a first storage block of the memory unit storing storage data, and outputting the storage data according to the pattern signal; a second storage block of the memory storing a compare signature corresponding to the storage data; and the compare module producing a test signature according to the storage data output by the memory unit, and comparing the test signature to the compare signature and outputting a testing result for judging validity of the memory unit. Thereby, the memory unit according to the present invention is partitioned into two storage blocks for storing the storage data and the compare signature, respectively, and thus achieving the purposes of saving the testing time, costs, and hardware resources.


