Nonvolatile Memory Sense Amplifier Voltage Parameter Changes

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Solution Overview

Problem

Current nonvolatile memory devices face challenges in reducing complexity and size while maintaining effective data storage capabilities, particularly in distinguishing data stored in memory cells using reference cells that store different states.

Innovation Solution

The proposed nonvolatile memory device employs a sense amplifier circuit that applies distinct read voltages to bit lines, allowing for the comparison of current flows through memory cells and reference cells to determine data states, thereby reducing the need for multiple reference states and simplifying the circuit design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple reference memory cells storing different states are used to distinguish data, then data distinction capability is improved, but device complexity and size increase

Engineering Contradiction:
Improvedata distinction capabilityVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by using different read voltages (first read voltage and second read voltage) applied to different bit lines to distinguish data states. Instead of using multiple reference cells with different stored states, the invention changes the voltage parameter to achieve the same distinction function, thereby reducing complexity while maintaining measurement precision.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple reference memory cells storing different states are used to distinguish data, then data distinction capability is improved, but device size increases

Engineering Contradiction:
Improvedata distinction capabilityVSAvoiddevice size
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The invention replaces the need for multiple reference memory cells with a parameter-based approach using different read voltages on different bit lines. This eliminates the requirement for additional reference cells and their associated circuitry, thereby reducing the overall device area while preserving the ability to distinguish between stored data states.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple reference memory cells storing different states are used to distinguish data, then data distinction capability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedata distinction capabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent simplifies manufacturing by replacing multiple reference memory cells with a voltage-based distinction mechanism. The manufacturing process no longer requires precise fabrication and testing of multiple reference cells with different stored states, but rather involves implementing different read voltage levels on different bit lines, which is a simpler and more manufacturable approach.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10210931B2Nonvolatile memory device including reference memory cell with fixed state
Publication Date: 2019.02.19 SAMSUNG ELECTRONICS CO LTD
  • US10210931B2 patent drawing
  • US10210931B2 patent drawing
  • US10210931B2 patent drawing

AI summary

A nonvolatile memory device includes: first memory cells connected to a first source line and a first bit line; second memory cells connected to a second source line and a second bit line; and a sense amplifier circuit connected to the first and second source lines and the first and second bit lines. The sense amplifier circuit includes: a first sense amplifier configured to apply a first read voltage to the first bit line and output a first amount of current of a selected first memory cell; a second sense amplifier configured to apply a second read voltage to the second bit line and output a second amount of current of a selected second memory cell; and a comparator configured to compare the first amount of current with the second amount of current to identify data of the selected first memory cell.