Memory Device Sequencer Dynamic Voltage Adjustment
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Solution Overview
Problem
NAND flash memory devices face challenges in efficiently applying appropriate voltages to word lines due to degradation of transfer transistors, leading to improper voltage conduction and increased load on the transistors, which can result in reduced performance and lifespan.
Innovation Solution
A memory device with a sequencer that adjusts the control voltage to the transfer transistor based on the program loop number or erase loop number, applying a lower voltage (VPGMHL) when the transistor is less degraded and a higher voltage (VPGMHH) when it is more degraded, to manage the frequency of use and prevent unnecessary stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed high voltage is applied to the transfer transistor gate to ensure proper voltage conduction, then voltage application reliability is improved, but transistor degradation accelerates and lifespan reduces
Solution Approach 1:
The patent applies dynamic voltage adjustment to the transfer transistor gate based on the loop count. The gate voltage is changed from an initial high voltage (e.g., 10V) to a reduced voltage (e.g., 5V) when a predetermined number of program or erase loops is reached. This dynamic adjustment ensures proper voltage conduction during early cycles while reducing stress and extending transistor lifespan in later cycles.
Solution Approach 2:
The patent changes the voltage parameter of the transfer transistor gate based on operational history. By monitoring the loop count and adjusting the gate voltage accordingly, the system adapts the electrical parameters to balance between ensuring proper word line voltage application and preventing excessive transistor degradation over time.
2Duration of action of stationary object
If the control voltage to the transfer transistor is reduced to extend its lifespan, then transistor durability is improved, but voltage conduction to word lines may become insufficient
Solution Approach 1:
The patent applies a higher initial voltage to the transfer transistor gate before degradation occurs. This preliminary high voltage ensures reliable voltage conduction to the word lines during the early operational cycles when the transistor is still healthy and can handle the stress without excessive degradation.
Solution Approach 2:
The system dynamically switches between high voltage mode (for reliable conduction) and reduced voltage mode (for extended lifespan) based on the loop count threshold. This dynamic approach ensures that voltage conduction reliability is maintained when needed while protecting the transistor during later operational phases.
3Productivity
If repeated program and erase operations are performed to increase productivity, then data storage capacity is improved, but transfer transistor degradation accelerates
Solution Approach 1:
The patent implements periodic voltage adjustment based on loop count intervals. Instead of continuously varying the voltage, the system maintains a high voltage until a predetermined number of loops is reached, then switches to a reduced voltage for the next interval. This periodic action allows the system to handle repeated program and erase operations while periodically reducing stress on the transfer transistor to prevent degradation.
Data Source
AI summary
According to one embodiment, a memory device comprises a first memory cell configured to store data, a first word line connected to the first memory cell, a first circuit configured to supply a voltage to the first word line, a second circuit configured to control the first circuit, and a sequencer configured to control the first circuit and the second circuit. The sequencer, when data is written to the first memory cell, determines whether a condition is satisfied or not. The sequencer causes the second circuit to generate a first voltage, when the sequencer determines that the condition is not satisfied, and causes the second circuit to generate a second voltage which is higher than the first voltage, when the sequencer determines that the condition is satisfied.