Memory Device Setting Data Recovery for Latch Circuit Errors
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Solution Overview
Problem
Non-volatile memory devices face reliability issues due to temporary errors in latch circuits that affect setting data, leading to inconsistent operation environments for memory cells.
Innovation Solution
A memory device with a memory cell array, latch circuit, and control logic that compares reference and load setting data, performing a recovery operation to reload correct setting data when a mismatch is detected, ensuring consistent operation environments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If setting data is stored in the latch circuit for memory operations, then operation speed is improved, but reliability deteriorates due to temporary errors in the latch circuit
Solution Approach 1:
The patent applies preliminary action by performing error detection and recovery operations before the latch circuit can cause incorrect operations. The control logic compares setting data in the latch circuit with reference setting data from the memory cell array, and if errors are detected, automatically reloads correct data from the array back to the latch circuit, preventing erroneous operations from occurring.
Solution Approach 2:
The patent implements feedback by continuously monitoring the setting data in the latch circuit against the reference data in the memory cell array. The control logic uses comparison results to determine whether errors occurred and automatically triggers recovery operations when mismatches are detected, creating a closed-loop error correction system.
2Reliability
If a comparison operation is added to detect errors, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges the error detection function with the existing control logic that manages memory operations. The control logic that already exists for controlling memory read/write operations is enhanced to also perform comparison operations between latch circuit setting data and reference setting data, combining multiple functions into a single control unit rather than adding separate dedicated error detection hardware.
3Reliability
If a recovery operation is performed to reload setting data, then reliability is improved, but loss of time increases
Solution Approach 1:
The reference setting data is pre-stored in the memory cell array before any operations occur. This preliminary preparation allows the control logic to immediately compare and recover data when errors are detected, without needing to wait for external intervention or perform complex reconstruction operations, thereby minimizing recovery time.
Solution Approach 2:
The system performs self-service error correction by automatically detecting errors in the latch circuit and autonomously reloading correct data from the memory cell array without requiring external intervention. This self-correcting mechanism eliminates the need for manual error detection and correction processes, reducing overall correction time.
Data Source
AI summary
A memory device includes a memory cell arrange storing reference setting data including information regarding setting operations of the memory device. The reference setting data is loaded from the memory cell array and stored as load setting data in a latch circuit. The reference setting data stored in the memory cell array and the load setting data stored in the latch circuit are compared to determine whether the reference setting data and the load setting data match, and when it is determined that the reference setting data and the load setting data do not match, the reference setting data is loaded from the memory cell array back to the latch circuit.


