Semiconductor Memory Setup Data Output Path Bypass
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory devices using Content Addressable Memory (CAM) cells for storing setup data face limitations in outputting this data directly to the outside of the chip without going through a data decision unit, which can lead to inefficiencies and increased chip area requirements.
Innovation Solution
A semiconductor memory device architecture that includes a setup data storage block with duplicate data, an access unit, a first transfer unit to transfer setup data directly to a data decision unit and output unit, and a control signal to manage data output, allowing direct transfer and output of setup data to the outside of the chip without additional internal registers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If setup data is stored in a CAM cell block and output through the data decision unit, then data reliability is improved, but chip area increases and output efficiency decreases
Solution Approach 1:
The patent divides the data storage into two separate blocks: a CAM cell block for storing setup data and a separate data decision unit for processing normal data. This segmentation allows the setup data to be accessed directly without passing through the data decision unit, reducing chip area while maintaining reliability through the dedicated CAM cell storage structure.
Solution Approach 2:
The patent extracts the setup data output path from the normal data processing path by introducing a separate first transfer unit that directly transfers setup data from the CAM cell block to the data output unit, bypassing the data decision unit. This extraction reduces the chip area occupied by the data decision unit while maintaining data reliability through the dedicated setup data storage and transfer pathway.
2Reliability
If setup data goes through the data decision unit for output, then data correctness is verified, but output time increases and efficiency decreases
Solution Approach 1:
The patent segments the data transfer pathways into two independent routes: one for setup data that bypasses the data decision unit, and another for normal data that goes through the data decision unit. This segmentation allows setup data to be output efficiently without the verification delay, while normal data maintains its correctness verification through the data decision unit.
Solution Approach 2:
The patent introduces a first transfer unit as an intermediary that directly connects the CAM cell block to the data output unit for setup data transfer. This intermediary bypasses the data decision unit, enabling fast output of setup data while maintaining correctness through the dedicated transfer pathway. The second transfer unit serves as an intermediary for normal data, connecting the data decision unit to the data output unit.
3Speed
If additional internal registers are added for direct setup data output, then output speed improves, but chip area increases
Solution Approach 1:
The patent makes the data output unit multi-functional by enabling it to directly receive and output setup data from the CAM cell block without requiring separate internal registers. The data output unit serves both as the output interface for normal data (through the second transfer unit) and as the direct output destination for setup data (through the first transfer unit), eliminating the need for additional registers while maintaining high output speed.
Data Source
AI summary
A semiconductor memory device includes a normal data storage block configured to store a normal data, a setup data storage block for storing a setup data including at least two duplicate data, an access unit configured to access the normal data of the normal data storage block or the setup data of the setup data storage block, a first transfer unit configured to transfer the setup data accessed by the access unit, a data decision unit configured to determine a correct data based on the setup data transferred by the first transfer unit, a second transfer unit configured to transfer the normal data accessed by the access unit, and a data output unit configured to output the setup data transferred by the first transfer unit or the normal data transferred by the second transfer unit to the outside of the semiconductor memory device in response to a control signal.