Semiconductor Memory Device Shared Inversion Bus Area Reduction

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Solution Overview

Problem

The existing semiconductor memory devices have a large size due to the need for separate write and read inversion buses, which increases the number of lines required for the DBI function, occupying a significant area on the chip.

Innovation Solution

Integrating the write and read inversion buses into a single inversion bus, with a selector to selectively load and transfer inversion information, allowing read and write inversion units to reflect the inversion information on the shared bus, reducing the overall number of lines necessary for the DBI function.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate write and read inversion buses are used, then the inversion function can be fully implemented, but the area occupied by the inversion bus increases

Engineering Contradiction:
Improveinversion functionVSAvoidinversion bus area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the separate write inversion bus and read inversion bus into a single shared inversion bus. The selector circuit multiplexes the inversion information from either write or read operations onto the same bus, allowing both functions to coexist without requiring separate dedicated buses for each operation type.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared inversion bus is designed to serve multiple functions by carrying both write inversion information and read inversion information at different times. The selector circuit enables the bus to be universally used for both write and read operations, eliminating the need for separate dedicated buses.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of information

If separate write and read inversion buses are used, then the inversion information can be transferred accurately, but the number of lines required increases

Engineering Contradiction:
Improveinversion information transferVSAvoidnumber of lines
Core Design Contradiction:
Loss of informationVSQuantity of substance

Solution Approach 1:

The patent combines two separate inversion buses (write inversion bus and read inversion bus) into one shared inversion bus. By merging these buses, the total number of lines is reduced while the selector circuit ensures that inversion information is accurately transferred for either write or read operations as needed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The selector circuit acts as an intermediary between the inversion information sources and the shared inversion bus. It mediates the transfer of inversion information by directing either write inversion information or read inversion information to the appropriate destination through the shared bus, preventing information loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7830728B2Semiconductor memory device
Publication Date: 2010.11.09 SK HYNIX INC
  • US7830728B2 patent drawing
  • US7830728B2 patent drawing
  • US7830728B2 patent drawing

AI summary

Disclosed is a semiconductor memory device includes a selector for selectively loading read inversion information and write inversion information on an inversion bus, the inversion bus for transferring the inversion information loaded by the selector, a plurality of read inversion units for reflecting the inversion information from the inversion bus to output data, and a plurality of write inversion units for reflecting the inversion information from the inversion bus to input data.