Semiconductor Memory Device Slit Conductor Segmentation
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Solution Overview
Problem
In semiconductor memory devices, the shrinkage of conductors during the production process leads to distortion of the silicon substrate, alignment deviations, and increased chip size, while attempts to reduce conductor burial in slit portions result in decreased memory cell density and higher wiring resistance.
Innovation Solution
The implementation of slit portions with conductors buried only at the ends and not in the intermediate portions, combined with a silicide film along the impurity diffusion regions, reduces substrate distortion and chip size while maintaining memory cell density and lowering wiring resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductors are buried in slit portions to reduce wiring resistance, then wiring resistance decreases, but substrate distortion increases and chip size increases
Solution Approach 1:
The conductor burial is segmented into two zones: intermediate portions where conductors are not buried to maintain substrate flatness, and end portions where conductors are buried to reduce wiring resistance. This segmentation allows the system to achieve low wiring resistance without excessive substrate distortion.
Solution Approach 2:
Different regions of the slit portion are assigned different conductor burial characteristics. The intermediate portions have no conductor burial (maintaining substrate quality), while the end portions have conductor burial (optimizing electrical properties). This local differentiation resolves the contradiction between wiring resistance and substrate distortion.
2Length of stationary object
If conductors are buried in slit portions to reduce chip size, then chip size decreases, but substrate distortion increases
Solution Approach 1:
The conductor burial is segmented into end portions (for chip size reduction) and intermediate portions (for substrate distortion control). By limiting conductor burial to only the end portions, the chip size is reduced without causing excessive substrate distortion that would occur with full-length conductor burial.
3Manufacturing precision
If conductors are not buried in intermediate portions to reduce substrate distortion, then substrate distortion decreases, but wiring resistance increases
Solution Approach 1:
The slit portion is divided into regions with different conductor burial characteristics. Intermediate portions exclude conductors to maintain substrate flatness, while end portions include conductors to ensure low wiring resistance. This local quality differentiation allows the system to achieve both substrate distortion control and acceptable wiring resistance.
4Manufacturing precision
If conductors are not buried in intermediate portions to maintain alignment precision, then alignment deviation decreases, but wiring resistance increases
Solution Approach 1:
The conductor burial is segmented to exclude intermediate portions (maintaining alignment precision) while including end portions (maintaining wiring resistance). This segmentation strategy allows the system to achieve both alignment precision and acceptable electrical performance.
Data Source
AI summary
A semiconductor memory device includes a silicon substrate having an impurity diffusion region, and a memory cell array. The memory cell array includes conductive layers laminated on the silicon substrate via interlayer insulation layers, a semiconductor layer extending in a direction of the lamination of the conductive layers, a charge storage film disposed between the conductive layers and the semiconductor layer, and an electrode disposed on the conductive layers. A groove having a direction of the lamination as a depth direction and a first direction different from the lamination direction as a lengthwise direction is formed through the conductive layers. The silicon substrate includes a silicide film disposed in the impurity diffusion region along the groove. The memory cell array includes a conductor, which is in contact with the electrode and the silicide film, in the groove. In the first direction, the conductor is shorter in length than the groove.