Memory Control Circuit Optimizing Program Voltage via Smart Verify
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Solution Overview
Problem
Existing non-volatile memory devices face challenges in efficiently determining the program voltage required for programming memory cells, especially as these cells are repeatedly programmed and erased, leading to the need for frequent adjustments in program voltage, which slows down the programming operation.
Innovation Solution
A control circuit determines a program lower tail voltage after a first program pulse and calculates a second program voltage based on this, applying it to selected word lines to achieve a desired distribution of threshold voltages in memory cells without requiring further program pulses, thereby optimizing the programming process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple program pulses are applied to adjust program voltage for cycling conditions, then the threshold voltage distribution accuracy is improved, but the programming time increases
Solution Approach 1:
The patent applies a first program pulse before verification to preliminarily adjust the threshold voltage distribution of memory cells. This preliminary action accounts for cycling conditions in advance, positioning the distribution closer to the target state before the verify operation, thereby reducing the need for multiple adjustment pulses and shortening overall programming time while maintaining accuracy
Solution Approach 2:
The patent implements a verify operation after the first program pulse to measure the actual threshold voltage distribution. This feedback mechanism allows the system to determine whether the preliminary program pulse achieved the desired distribution, enabling intelligent decision-making about whether additional pulses are needed, thus optimizing the balance between accuracy and programming time
Data Source
AI summary
A memory apparatus and method of operation is provided. The apparatus includes a block of memory cells each connected to one of a plurality of word lines and arranged in strings and configured to retain a threshold voltage. A control circuit couples to the word lines and the strings determines a program lower tail voltage of a distribution of the threshold voltage following a first program pulse. The control circuit calculates a second program voltage of a second program pulse based on the program lower tail voltage and applies the second program pulse to each of selected ones of the plurality of word lines associated with the memory cells to program the memory cells such that the distribution of the threshold voltage of the memory cells have a desired program lower tail voltage without further program pulses.


