Memory Device Source Contact Formation on Drain Region
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Solution Overview
Problem
Conventional memory devices face challenges in reducing source region size and asymmetry coupling effects between curved control gates, which complicates the manufacturing process and affects operation characteristics.
Innovation Solution
The solution involves forming memory devices with specific P-typed impurity regions and channel regions with varying concentrations, eliminating the need for a depletion transistor and additional photolithography and ion implantation processes, and arranging source and drain contacts linearly to improve integration and prevent coupling effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If curved control gates are used to form spacers, then the source contact can be formed between source regions, but asymmetry coupling effects occur and source region size reduction becomes difficult
Solution Approach 1:
The patent applies asymmetry by using curved control gates with different radii of curvature for different transistor types. First transistors have control gates with a first radius of curvature, while second transistors have control gates with a second radius of curvature that is different from the first. This asymmetric design compensates for coupling effects between adjacent control gates while maintaining the ability to form source contacts between source regions.
2Length of moving object
If depletion transistors are used to overcome source region size limitations, then source region size can be reduced, but additional photolithography and ion implantation processes are required
Solution Approach 1:
The patent changes the geometric parameters of the control gates (radius of curvature) to achieve the desired electrical characteristics without requiring depletion transistor structures. By adjusting the radius of curvature of the control gates, the patent can control the electric field distribution and threshold voltages, thereby avoiding the need for additional ion implantation processes while still enabling source region size reduction.
3Reliability
If linear control gates are used instead of curved control gates, then coupling effects are prevented, but spacer formation between source regions becomes difficult
Solution Approach 1:
The patent uses asymmetric curved control gates with different radii of curvature to simultaneously achieve spacer formation and prevent harmful coupling effects. The curvature is optimized to provide the necessary electric field confinement for spacer formation while the asymmetric design between first and second transistors prevents unwanted coupling interactions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, enhances the integration degree of memory devices, and effectively prevents operation characteristic deterioration due to coupling effects, while maintaining positive and negative threshold voltages for transistors.
Implementation Method 1
The first channel region may be doped with a P-typed impurity having a first concentration. The second channel region may be doped with a P-typed impurity having a second concentration.
Data Source
AI summary
In a memory device and a method of manufacturing the memory device, a source contact connected to a common source line may be formed on a drain region instead of a source region. A transistor having a negative threshold voltage may be formed between the source region and the drain region. A channel of the transistor may be formed. Because the source contact is formed on the drain region, the size of the source region may be reduced. An integration degree of the memory device may be improved. A control gate may linearly extend in a second direction because the source contact is not formed on the source region.