Semiconductor Memory Source Line Control Circuit Parasitic Resistance Compensation

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Solution Overview

Problem

Current semiconductor memory devices face challenges in optimizing operational characteristics, particularly in controlling the source line voltage to accurately determine threshold voltages and manage parasitic resistances, leading to potential errors and inefficiencies in data storage and retrieval.

Innovation Solution

The semiconductor memory device employs a source line control circuit that monitors the total current flowing through the source line and adjusts the source line voltage based on the monitoring results, using a replica circuit to compensate for parasitic resistances and maintain accurate threshold voltage determination, thereby improving operational characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the source line voltage is not controlled based on total current monitoring, then the device complexity is reduced, but the measurement precision of threshold voltage determination deteriorates

Engineering Contradiction:
Improvethreshold voltage determination accuracyVSAvoidsource line control circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The source line control circuit monitors the total current flowing through the source line and adjusts the source line voltage based on the monitoring results. This feedback mechanism ensures accurate threshold voltage determination by dynamically compensating for voltage drops caused by parasitic resistances, while maintaining a manageable device complexity through integrated control.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

A replica circuit is introduced as an intermediary element that models the parasitic resistance characteristics. The replica circuit receives a replica current and generates a voltage drop that mirrors the actual source line behavior, enabling indirect measurement and compensation without directly interfering with the main memory operation circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If parasitic resistances are not compensated, then the device complexity is reduced, but the reliability of data storage operations deteriorates

Engineering Contradiction:
Improvedata storage operation reliabilityVSAvoidsource line control circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control circuit continuously monitors the total current and adjusts the source line voltage in real-time to compensate for parasitic resistance effects. This feedback-based compensation ensures reliable data storage operations by maintaining accurate voltage levels despite the presence of parasitic resistances in the source line.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The replica circuit serves as a mediator that models parasitic resistance characteristics. By introducing this intermediary model, the system can predict and compensate for voltage drops without requiring complex direct measurements, thus improving reliability while keeping the added complexity manageable.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If a replica circuit is introduced to compensate for parasitic resistances, then the measurement precision of threshold voltage determination is improved, but the device complexity increases

Engineering Contradiction:
Improvethreshold voltage determination accuracyVSAvoidsource line control circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

A replica circuit is introduced that creates a simplified copy of the parasitic resistance characteristics. This copy receives a replica current and generates a corresponding voltage drop, enabling indirect measurement and compensation of the actual source line voltage without requiring complex direct measurement circuits in the main memory path.

Inventive Principle:
Principle #26Copying

4Productivity

If the source line voltage is adjusted dynamically based on current monitoring, then the productivity of data retrieval operations is improved, but the use of energy increases

Engineering Contradiction:
Improvedata retrieval operation efficiencyVSAvoidsource line control energy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The total current monitoring and source line voltage adjustment are performed periodically at critical operation points (during program verification and data read operations). This periodic action improves data retrieval productivity by ensuring accurate voltage levels when needed, while minimizing energy consumption by not continuously adjusting the voltage throughout all operational states.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the accuracy of threshold voltage determination, reduces data pattern dependency, and improves the reliability and efficiency of data storage operations, while also minimizing the impact of parasitic resistances and chip size increases.

Implementation Method 1

a source line control circuit that monitors a total current flowing through the source line and that controls a source line voltage based on monitoring results

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

a first voltage is applied to a selected word line during a first operation and a second voltage that is higher than the first voltage is applied to the selected word line during a second operation

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentUS9524787B2Semiconductor memory device
Publication Date: 2016.12.20 KIOXIA CORP
  • US9524787B2 patent drawing
  • US9524787B2 patent drawing
  • US9524787B2 patent drawing

AI summary

A semiconductor memory device includes memory cells, word lines that are electrically connected to gates of the memory cells, a source line that is electrically connected to one end of the memory cells, and a controller that executes a read operation over first, second, third, and fourth time periods. A first voltage is applied to a selected word line during the first and second time periods of the first operation, and a second voltage that is higher than the first voltage is applied to the selected word line during the third and fourth time periods of the second operation. A third voltage is applied to the source line during the first and third time periods, and fourth and fifth voltages that are lower than the third voltage are applied to the source line during the second and fourth time periods, respectively.