Memory Bit Line Spacer Air Gaps for Lower Parasitic Capacitance

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Solution Overview

Problem

As semiconductor devices become highly integrated, the reduced distance between patterns and contact plugs leads to increased parasitic capacitance, causing performance deterioration such as reduced operating speed.

Innovation Solution

Incorporating air gap-based spacer structures between bit line structures and contact pad structures, including first and second air gaps that extend along sidewalls and surround contact pad structures, respectively, to reduce parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the distance between patterns and contact plugs is reduced to achieve high integration, then device integration is improved, but parasitic capacitance increases causing performance deterioration

Engineering Contradiction:
Improvedevice integrationVSAvoidparasitic capacitance
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

An air gap structure is introduced as an intermediary between the bit line structure and contact pad structure. This air gap acts as a mediator that reduces parasitic capacitance while allowing the patterns and contact plugs to remain in close proximity for high integration. The air gap physically separates the conductive elements, reducing capacitive coupling without increasing the footprint area.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If the distance between patterns and contact plugs is reduced, then area utilization is improved, but operating speed decreases due to increased parasitic capacitance

Engineering Contradiction:
Improvearea utilizationVSAvoidoperating speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The air gap serves as a mediator that enables close spacing for area efficiency while simultaneously reducing parasitic capacitance to maintain operating speed. By introducing this intermediate air-filled space, the patent achieves both compact layout and high-speed operation without compromising either parameter.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11776909B2Semiconductor memory device
Publication Date: 2023.10.03 SAMSUNG ELECTRONICS CO LTD
  • US11776909B2 patent drawing
  • US11776909B2 patent drawing
  • US11776909B2 patent drawing

AI summary

A semiconductor memory device includes word lines extending in a first direction on a semiconductor substrate, bit line structures crossing over the word lines and extending in a second direction intersecting the first direction, and contact pad structures between the word lines and between the bit line structures in plan view. A spacer structure extends between the bit line structures and the contact pad structures. The spacer structure includes a first air gap extending in the second direction along sidewalls of the bit line structures and a second air gap surrounding each of the contact pad structures and coupled to the first air gap.