ONON Sidewall Spacer Structure for MTP Memory Leakage Control
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Solution Overview
Problem
Multi-time programmable (MTP) memory devices face data retention performance degradation due to current leakage paths forming in the sidewall spacers of memory cell transistors, which affects the reliability of memory cells over time.
Innovation Solution
The implementation of a sidewall spacer structure using an alternating oxide and nitride layer configuration, specifically an ONON structure in memory regions and an ONN structure in logic regions, to inhibit the formation of current leakage paths and enhance data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional sidewall spacer structure is used in MTP memory devices, then the device can be manufactured with standard processes, but current leakage paths form in the sidewall spacers over time, degrading data retention performance
Solution Approach 1:
The sidewall spacer is constructed as a composite structure with alternating oxide and nitride layers (ONON structure), where each layer provides different electrical properties. The oxide layers provide good data retention characteristics while the nitride layers provide low leakage paths, creating a composite material that simultaneously addresses both requirements.
Solution Approach 2:
The sidewall spacer is segmented into multiple thin layers (oxide-nitride-oxide-nitride) rather than using a single uniform material. This segmentation allows each layer to perform its specialized function: oxide layers for charge storage and nitride layers for leakage prevention, resolving the contradiction between retention and leakage.
2Reliability
If an ONON sidewall spacer structure is used in memory regions, then data retention is improved, but the manufacturing process complexity increases compared to standard structures
Solution Approach 1:
The sidewall spacer is divided into multiple alternating layers of oxide and nitride materials. This segmentation enables each layer to contribute specific electrical properties, achieving superior data retention through the combined effect of low-leakage nitride layers and high-retention oxide layers.
Solution Approach 2:
The sidewall spacer employs a composite oxide-nitride-oxide-nitride structure where different materials are stacked to provide complementary electrical characteristics. The nitride layers suppress leakage currents while oxide layers maintain charge, creating a composite structure that outperforms single-material spacers.
3Ease of manufacture
If uniform sidewall spacer structure is used across both memory and logic regions, then manufacturing is simplified, but the memory region suffers from current leakage that degrades performance
Solution Approach 1:
Different sidewall spacer structures are applied to different regions: the ONON structure (oxide-nitride-oxide-nitride) is used specifically in memory regions where low leakage and high retention are critical, while simpler structures may be used in logic regions. This local differentiation optimizes performance where needed without unnecessarily complicating the entire device.
Data Source
AI summary
A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.