Memory Structure Spacer Design for Metal Silicide Positioning
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Solution Overview
Problem
The existing memory structure manufacturing process faces challenges in accurately forming a salicide block layer between the memory cell and select gate structures, leading to inconsistent metal silicide formation, decreased yield, and reliability issues.
Innovation Solution
A memory structure and manufacturing method that include a substrate, gate structures, spacers, and metal silicide layers, where the third spacer is strategically positioned on the sidewall of the first spacer to cover a portion of the second gate's top surface, allowing precise control over metal silicide formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a patterning process is used to form the salicide block layer, then the manufacturing process is simple, but the formation position of metal silicide cannot be accurately controlled
Solution Approach 1:
The patent forms multiple spacers (first spacer, second spacer, third spacer) around the gate structure before forming the metal silicide layer. These spacers are prepared in advance to define the precise region where metal silicide will be formed, ensuring accurate positioning without relying solely on subsequent patterning processes.
Solution Approach 2:
The spacers act as intermediary structures that mediate between the gate structure and the metal silicide formation. The first spacer, second spacer, and third spacer collectively define the boundaries and positioning for the salicide block layer, serving as a template that guides precise metal silicide deposition.
2Reliability
If the salicide block layer formation is not accurately controlled, then the manufacturing process is fast, but the yield and reliability of memory device decrease
Solution Approach 1:
The patent prepares the first spacer, second spacer, and third spacer in advance to define the precise region for metal silicide formation. This preliminary structuring ensures that when metal silicide is formed, it appears only in the desired location, improving reliability without requiring complex post-formation adjustments.
Solution Approach 2:
The spacer structures self-align with the gate to automatically define the salicide block region. The first spacer on the sidewall of the gate, combined with the second and third spacers, creates a self-defining template that guides metal silicide formation without requiring additional alignment steps, thereby improving reliability while maintaining manufacturing efficiency.
3Manufacturing precision
If multiple spacers are added to control metal silicide positioning, then positioning accuracy improves, but the manufacturing process becomes more complex
Solution Approach 1:
The patent divides the spacer structure into multiple segments: first spacer on the gate sidewall, second spacer, and third spacer. Each segment serves a specific function in defining the metal silicide formation region, allowing precise positioning through modular structure construction rather than requiring a single complex patterning step.
Solution Approach 2:
The patent uses spacers extending in the vertical dimension from the gate structure to define horizontal positioning of metal silicide. The first spacer rises from the gate sidewall, and the second and third spacers extend further, using vertical height differences to control the lateral boundaries of the salicide block layer, thereby achieving precise positioning through dimensional transformation.
Data Source
AI summary
A memory structure including a substrate, a first gate structure, a second gate structure, a first spacer, a second spacer, and a third spacer is provided. The first gate structure includes a first gate and a charge storage layer. The charge storage layer is disposed between the first gate and the substrate. The second gate structure is disposed on the substrate. The second gate structure includes a second gate. A height of the first gate is higher than a height of the second gate. The first spacer and the second spacer are respectively disposed on one sidewall and the other sidewall of the first gate structure. The first spacer is located between the first gate structure and the second gate structure. The third spacer is disposed on a sidewall of the first spacer and covers a portion of a top surface of the second gate.