3D Memory Stack Staircase Contacts for Dense Vertical Routing

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Microelectronic device designers face challenges in increasing integration density and performance while simplifying and reducing fabrication costs, particularly in vertical memory array architectures where electrical connections are complex and costly.

Innovation Solution

The development of a microelectronic device structure with stadium structures and staircase structures that facilitate efficient electrical connections between conductive and insulative materials, allowing for improved integration and reduced fabrication complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If vertical memory array architecture is used to increase memory density, then integration density is improved, but electrical connection complexity increases

Engineering Contradiction:

Improveintegration densityVSAvoidelectrical connection complexity

Core Design Contradiction:

Area of moving objectVSDevice complexity

Solution Approach 1:

The patent divides the electrical connection path into discrete segments using staircase contact holes at different vertical levels. Each contact hole connects to a specific tier of conductive structures, creating modular connection points that simplify the overall connection architecture while maintaining vertical integration density.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar (2D) routing to three-dimensional (3D) connection architecture by using vertically stacked contact holes at different heights. This dimensional change allows electrical connections to access conductive structures at multiple vertical levels without increasing lateral routing complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If staircase structures are formed to provide electrical access to conductive material, then electrical connectivity is improved, but fabrication complexity increases

Engineering Contradiction:

Improveelectrical connectivityVSAvoidfabrication complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines the formation of multiple contact holes at different vertical levels into a single integrated fabrication process sequence. By forming contact holes for multiple tiers simultaneously or in close succession using the same lithography and etching tools, the patent reduces the cumulative fabrication complexity that would otherwise result from separate processing steps for each contact level.

Inventive Principle:

Principle #5Merging (Combining)

3Area of moving object

If feature dimensions are reduced to increase integration, then device density is improved, but manufacturing precision requirements increase

Engineering Contradiction:

Improvedevice densityVSAvoidfeature dimension control

Core Design Contradiction:

Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent introduces intermediary contact hole structures that serve as mediators between the reduced-dimension conductive features and the larger-dimension routing structures. These intermediate contact holes provide a buffer zone that is easier to manufacture with standard precision, while still enabling connection to the high-density vertical features through controlled etching and alignment processes.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12526989B2Microelectronic devices, memory devices, and electronic systems, and methods of forming the same

Publication Date: 2026.01.13 MICRON TECHNOLOGY INC

AI summary

A microelectronic device includes a stack structure including tiers each including insulative material and conductive material vertically adjacent the insulative material. The stack structure divided into at least two blocks separated from one another. The microelectronic device further includes at least one slot structure horizontally interposed between the at least two blocks of the stack structure. The at least one slot structure including additional insulative material and at least one contact structure extending through the additional insulative material to source tier underlying the stack structure.