Memory Dual Standby Bias Switching for Low-Current Read Readiness
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Solution Overview
Problem
Existing memory devices, particularly SPI NOR products, face high standby current draw due to the need for both read and write bias voltages during standby mode, which is problematic for low-power systems.
Innovation Solution
Implementing a dual standby mode system with separate read and write bias systems, allowing for a read bias voltage of 1.5-1.8V and a write bias voltage of 2.0-2.8V, enabling faster read operations with reduced standby current draw by disabling the write bias system during read mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If both read and write bias systems are enabled during standby mode, then the memory device is ready for both read and write operations, but standby current consumption increases
Solution Approach 1:
The patent implements dynamic standby mode selection where the memory device can switch between read standby mode and write standby mode based on operational needs. In read standby mode, only the read bias system is enabled while the write bias system is disabled, reducing standby current. The system dynamically transitions to write standby mode when write operations are required, ensuring both energy efficiency and operational readiness.
Solution Approach 2:
The patent segments the bias systems into separate read bias system and write bias system, allowing independent control of each system. This segmentation enables the memory device to enable only the necessary bias system based on the anticipated operation type, thereby reducing unnecessary power consumption while maintaining readiness for the required operation.
2Use of energy by moving object
If write bias system is disabled during read standby mode, then standby current is reduced, but wake-up time for write operations increases
Solution Approach 1:
The patent employs dynamic mode switching that allows rapid transition between read standby mode and write standby mode. When a write operation is anticipated or required, the system quickly switches from read standby mode (low power) to write standby mode (higher power, faster response), minimizing the time penalty while maintaining energy efficiency during extended read-only periods.
Solution Approach 2:
The patent implements a mechanism to anticipate operation requirements and pre-switch to the appropriate standby mode. By detecting whether read or write operations are likely to be performed next, the system can proactively configure the appropriate bias system before the operation occurs, reducing wake-up time without requiring both systems to remain continuously enabled.
3Use of energy by moving object
If separate read and write bias systems are implemented, then power consumption is optimized, but device complexity increases
Solution Approach 1:
The patent divides the bias system into separate read bias system and write bias system components, each optimized for its specific function. This segmentation allows independent power management and control of each subsystem, enabling the memory device to power down unnecessary components and reduce overall power consumption while maintaining the capability for both read and write operations.
Solution Approach 2:
The patent designs the separate bias systems to share common control logic and state machine infrastructure, allowing a single control mechanism to manage both read and write standby modes. This universal control approach reduces the complexity increase that would otherwise result from having completely separate control paths for each bias system.
Data Source
AI summary
1. The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.