Nonvolatile Memory State Ordering Swap for Program Time Reduction

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Solution Overview

Problem

Nonvolatile memory devices require lengthy program verification times, which increase overall programming time due to the need for multiple program loops and verification operations for each state in memory cells.

Innovation Solution

A method and device that dynamically change the state ordering of memory cells during programming, swapping between two state orderings to optimize program speed, allowing for reduced program time by altering the state correspondence between data values and states, thereby shortening the total time required for programming operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple program loops with verification operations are executed to store multiple data bits in memory cells, then data storage reliability is improved, but program time increases

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidprogram time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent dynamically changes the state ordering of memory cells during the programming process. Instead of using a fixed state ordering throughout all program loops, the system swaps between different state orderings (e.g., from first state ordering to second state ordering and back) to optimize verification speed in different program loops, thereby reducing total program time while maintaining data storage reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of state ordering during programming operations. By swapping the correspondence relationship between memory cell states and data values (e.g., changing from first state ordering where state 0 corresponds to data value 0 to second state ordering where state 0 corresponds to data value 1), the system optimizes verification operations across multiple program loops

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If verification operations are performed for each program state in every program loop, then programming accuracy is improved, but program speed deteriorates

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogram speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent introduces dynamic state ordering changes during the programming process. By swapping state orderings between different program loops, the system optimizes verification operations without compromising programming accuracy. This dynamic adjustment allows faster verification in certain loops while maintaining the required precision through controlled state correspondence changes

Inventive Principle:
Principle #15Dynamics

3Device complexity

If fixed state ordering is used for programming operations, then device complexity is reduced, but program time increases

Engineering Contradiction:
Improvedevice complexityVSAvoidprogram time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent implements dynamic state ordering swaps during programming operations. The control circuit swaps between first and second state orderings in different program loops, which reduces program time by optimizing verification speed. This dynamic approach increases control circuit complexity but maintains overall device simplicity through systematic state management

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240379164A1Method of programming data in nonvolatile memory device and nonvolatile memory device performing the same
Publication Date: 2024.11.14 SAMSUNG ELECTRONICS CO LTD
  • US20240379164A1 patent drawing
  • US20240379164A1 patent drawing
  • US20240379164A1 patent drawing

AI summary

A method of programming data in a nonvolatile memory device includes setting a state ordering to a first state ordering, the state ordering representing a relationship between a plurality of states and data values of multi-bit data, performing, based on the first state ordering, a program operation on target memory cells of the plurality of memory cells, swapping the state ordering from the first state ordering to a second state ordering different from the first state ordering, performing, based on the second state ordering, the program operation on the target memory cells, re-swapping the state ordering from the second state ordering to the first state ordering, and performing, based on the first state ordering, the program operation on the target memory cells. Each memory cell of a plurality of memory cells of the nonvolatile memory device is programmed to have one of the plurality of states.