Memory Block Stripe Testing with Parameter-Based Subset Selection
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Solution Overview
Problem
Existing memory sub-systems face inefficiencies in block stripe testing, particularly in short stroke tests, which often result in uneven error distribution and require significant processing resources, leading to unreliable test results and increased complexity.
Innovation Solution
A memory sub-system controller implements a block stripe selection and testing method that uses random parameters to determine a subset of block stripes for testing, ensuring even distribution across dies and planes, thereby reducing processing resources and improving test accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional block stripe testing methods are used, then comprehensive coverage of memory blocks is achieved, but processing resources are significantly increased and test complexity is heightened
Solution Approach 1:
The patent segments the block stripe testing process into distinct phases: selection phase (choosing subset of block stripes based on parameters) and execution phase (performing tests on selected subset). This segmentation allows comprehensive testing goals to be achieved through multiple targeted subsets rather than testing all block stripes simultaneously, reducing per-test complexity while maintaining overall coverage.
Solution Approach 2:
The patent applies partial action by testing a carefully selected subset of block stripes rather than all block stripes in each test iteration. By using parameters to determine optimal subsets and repeating tests with different parameter combinations, the system achieves comprehensive coverage over time without the resource burden of testing everything in each iteration.
2Reliability
If traditional block stripe testing methods are used, then all block stripes are tested, but processing resources are significantly consumed and test time is increased
Solution Approach 1:
The patent tests a partial subset of block stripes in each iteration determined by parameters, rather than testing all block stripes. Multiple iterations with different parameter combinations ensure comprehensive coverage over time. This approach significantly improves testing efficiency by reducing the workload per iteration while maintaining overall test reliability through repeated sampling.
Solution Approach 2:
The patent employs periodic action by repeating block stripe tests multiple times with different parameter combinations. Each iteration tests a subset of block stripes, and through periodic repetition with varied parameters, the system achieves comprehensive coverage. This periodic approach distributes the testing workload over time, improving efficiency compared to single-pass comprehensive testing.
3Productivity
If subset of block stripes is tested, then processing resources are reduced and test speed is improved, but error distribution may become uneven
Solution Approach 1:
The patent applies dynamics by making the block stripe selection adaptive and variable through parameter adjustment. Instead of fixed subset selection, the system dynamically changes which block stripes are tested in each iteration based on parameters. This dynamic approach ensures that over multiple iterations, all block stripes are covered while maintaining fast subset-based testing speed in each individual iteration.
Solution Approach 2:
The patent uses parameter changes to control which subset of block stripes is selected for testing in each iteration. By varying parameters across multiple test iterations, the system ensures uniform error distribution coverage while maintaining the efficiency benefits of subset testing. Each parameter configuration targets different portions of the memory, achieving comprehensive coverage over time.
Data Source
AI summary
Various aspects of the present disclosure relate to a memory sub-system for block stripe selection and testing. A processing device determines to perform a test for a subset of block stripes of a plurality of block stripes of the memory device, where each block stripe of the plurality of block stripes spans the plurality of dies of the memory device, and the subset of block stripes includes less than all block stripes of the plurality of block stripes. The processing device obtains a first parameter that indicates a first block stripe to be tested and a second parameter that indicates a quantity of block stripes to be tested. The processing device initiates and performs the test for the subset of block stripes using the first parameter and the second parameter.