Nonvolatile Memory Sub-Block Erase With Victim Read
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Solution Overview
Problem
Current nonvolatile memory devices face challenges in reliably erasing data from three-dimensional memory cells without damaging adjacent cells, leading to inefficiencies and data retention issues.
Innovation Solution
The solution involves a method where a nonvolatile memory device performs a data erase operation by units of sub-blocks, including a data read operation and a soft program operation on victim sub-blocks before erasing the selected sub-block, using a delayed floating scheme to minimize data loss and ensure accurate erasure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a data erase operation is performed on a selected sub-block in three-dimensional nonvolatile memory, then data retention in the selected sub-block is improved, but data loss occurs in adjacent victim sub-blocks
Solution Approach 1:
The patent applies preliminary action by performing a read operation on victim sub-blocks before the erase operation, and then selectively performing a soft program operation on those victim sub-blocks that show data loss. This preparatory sequence prevents complete data loss in adjacent blocks before the main erase operation occurs on the selected sub-block.
2Reliability
If a read operation is performed on victim sub-blocks before erasure, then data loss in victim sub-blocks is detected, but operation time increases
Solution Approach 1:
The patent implements feedback by using the read operation results from victim sub-blocks to control subsequent soft program operations. The read operation provides feedback information about which victim sub-blocks have suffered data loss, and this feedback determines whether soft program operations are applied to specific victim sub-blocks, optimizing the balance between reliability and operation time.
3Reliability
If soft program operation is selectively performed on victim sub-blocks, then data retention in victim sub-blocks is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by performing soft program operations selectively only on victim sub-blocks that are determined to have data loss, rather than uniformly treating all sub-blocks. The control circuit identifies specific victim sub-blocks needing intervention and applies soft program operations locally to those areas, minimizing unnecessary operations and reducing overall system complexity.
Data Source
AI summary
A nonvolatile memory device includes a memory cell region, a peripheral circuit region, a memory block in the memory cell region, a row decoder in the peripheral circuit region, and a control circuit in the peripheral circuit region. The memory cell region includes a first metal pad. The peripheral circuit region includes a second metal pad and is vertically connected to the memory cell region by the first metal pad and the second metal pad. The memory block includes memory cells stacked in a direction intersecting a substrate, and is divided into a plurality of sub-blocks configured to be erased independently. The row decoder selects the memory block by units of a sub-block. The control circuit receives a data erase command for a selected sub-block among the plurality of sub-blocks, performs a data read operation on at least one victim sub-block among the plurality of sub-blocks in response to the data erase command, selectively performs a soft program operation on the at least one victim sub-block based on a result of the data read operation, and performs a data erase operation on the selected sub-block after the data read operation is performed and the soft program operation is selectively performed.