Memory Device Sub-Block Voltage Control for Unselected Cell Threshold
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Solution Overview
Problem
As memory devices become more integrated, their memory cells operate with increased sensitivity to ambient electrical changes, leading to unintended programming of unselected memory cells during program operations due to high pass voltages applied to unselected word lines, which can increase the threshold voltage of unselected memory cells.
Innovation Solution
A memory device with sub-blocks and buffer cells, where a first pass voltage is applied to unselected word lines connected to a selected sub-block, and a second pass voltage lower than the first is applied to unselected word lines connected to an unselected sub-block, along with a buffer line circuit to selectively turn on or off buffer cells, setting the buffer page position based on physical and electrical characteristics of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high pass voltage is applied to unselected word lines to ensure all memory cells are turned on, then the memory cells can be properly activated, but the threshold voltage of unselected memory cells increases due to sensitivity to ambient electrical changes
Solution Approach 1:
The memory block is divided into multiple sub-blocks, and the pass voltage application is segmented accordingly. Different pass voltages are applied to different sub-blocks based on their selection status, allowing differentiated voltage control that prevents threshold voltage increase in unselected cells while maintaining proper activation in selected cells
Solution Approach 2:
Different pass voltage levels are applied to different spatial regions (sub-blocks) of the memory array. Selected sub-blocks receive appropriate pass voltage for activation, while unselected sub-blocks receive reduced or no pass voltage, creating local quality differences that prevent harmful threshold voltage increases in unselected cells
2Quantity of substance
If the degree of integration of memory device becomes greater, then the storage capacity increases, but the memory cells operate with increased sensitivity to ambient electrical changes
Solution Approach 1:
The highly integrated memory array is segmented into multiple sub-blocks that can be independently controlled. This segmentation allows selective application of pass voltages only to active regions, reducing the overall electrical interference and sensitivity effects that would otherwise affect the entire large-scale integrated array
Solution Approach 2:
The pass voltage parameter is dynamically adjusted based on the selection state of different sub-blocks. By changing the voltage parameter from high (for selected blocks) to low or zero (for unselected blocks), the patent reduces electrical interference and sensitivity effects in highly integrated memory structures
Data Source
AI summary
There are provided a memory device and an operating method thereof. The memory device includes: sub-blocks divided with respect to a buffer page in which buffer cells are included; a voltage generator for, in a program operation of a selected sub-block among the sub-blocks, applying a first pass voltage to unselected word lines connected to the selected sub-block, and applying a second pass voltage lower than the first pass voltage to unselected word lines connected to an unselected sub-block; and a buffer line circuit for selectively turning on or turning off the buffer cells by selectively applying a turn-on voltage or a turn-off voltage to buffer lines connected to the buffer cells. A position of the buffer page is set as a default according to a physical structure of memory cells included in the sub-blocks, and is reset according to an electrical characteristic of the memory cells.