Memory Substrate Wiring Layout to Suppress Warpage
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Solution Overview
Problem
In semiconductor memory systems, the warpage of thinned rectangle-shaped substrates is a challenge due to thermal expansion coefficient differences between layers, leading to convex shape deformations, which complicates miniaturization and increases manufacturing costs.
Innovation Solution
The semiconductor memory system employs a multilayer substrate with adjusted wiring densities, particularly in the eighth layer, to equalize thermal expansion coefficients across layers, and uses an adhesive portion to counteract warpage forces, while also incorporating a meshed wiring pattern and slits in the seventh layer to reduce noise interference and simplify wiring design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the substrate is thinned to meet miniaturization requests, then the size and weight are reduced, but substrate warpage increases due to thermal expansion coefficient differences between layers
Solution Approach 1:
The patent adjusts the wiring density parameter in the eighth layer of the substrate to equalize thermal expansion coefficients across different layers. By changing the density parameter of the wiring pattern, the thermal expansion characteristics are modified to reduce warpage in thinned substrates
Solution Approach 2:
The patent applies different wiring densities to different layers of the substrate, with specific adjustment in the eighth layer. This local differentiation of wiring density creates varying thermal expansion characteristics in different regions/layers to counteract warpage forces
2Reliability
If wiring density is increased to improve signal transmission, then signal integrity improves, but thermal expansion coefficient differences increase causing more warpage
Solution Approach 1:
The patent optimizes the wiring density parameter to achieve a balance between signal integrity and thermal expansion control. By carefully adjusting this parameter in the eighth layer, both signal transmission quality and warpage suppression are improved simultaneously
Solution Approach 2:
The patent creates a composite structure with multiple wiring layers having different densities. This composite wiring architecture allows different layers to serve different functions: some layers optimized for signal transmission, others for thermal expansion management
3Object-affected harmful factors
If a meshed wiring pattern with slits is introduced to reduce noise and simplify design, then noise interference decreases, but manufacturing complexity increases
Solution Approach 1:
The patent divides the wiring pattern into segmented structures with slits and meshed regions. This segmentation breaks up continuous wiring into discrete sections, which reduces noise interference while the regular pattern provides manufacturing advantages
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses substrate warpage, maintains signal integrity, and reduces manufacturing costs by equalizing thermal expansion coefficients and optimizing wiring density, thereby enhancing the stability and efficiency of the semiconductor memory system.
Implementation Method 1
uses an adhesive portion to counteract warpage forces
Implementation Method 2
adjusted wiring densities, particularly in the eighth layer, to equalize thermal expansion coefficients across layers
Data Source
AI summary
According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.