Memory Subsystem Background Scan for Data Integrity

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Solution Overview

Problem

Existing memory systems lack an effective mechanism to proactively identify and mitigate unreliable memory regions before they cause uncorrectable errors, leading to potential data loss and system instability due to factors like NAND die intolerance, retention issues, read disturb, and cross-temperature defects.

Innovation Solution

Implementing a background scan operation in memory devices that iteratively reads and decodes codewords across memory regions to generate quality metrics, allowing for the identification and refresh or retirement of unreliable regions, thereby preventing uncorrectable errors and maintaining data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If background scan operation is implemented to proactively identify unreliable memory regions, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a background scan operation that proactively reads and decodes codewords from memory regions before uncorrectable errors occur. This preliminary action identifies unreliable memory regions by generating quality metrics (such as bit error counts) during iterative scanning, allowing the system to refresh or retire problematic regions in advance, thereby improving data reliability without waiting for actual data corruption

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory system performs self-diagnosis and self-maintenance through the background scan operation. The ECC decoder automatically generates quality metrics during decoding operations, and the system uses these metrics to identify and refresh unreliable memory regions without external intervention. This self-service mechanism continuously monitors and maintains memory health, improving reliability while the automated nature reduces the need for complex external monitoring systems

Inventive Principle:
Principle #25Self-service

2Measurement precision

If iterative reading and decoding of codewords is performed across all memory regions, then quality metrics are improved, but productivity decreases

Engineering Contradiction:
Improvequality metricsVSAvoidproductivity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The background scan operation is implemented as a periodic background task that iteratively reads and decodes codewords from memory regions at scheduled intervals. This periodic action allows the system to generate accurate quality metrics (bit error counts, decode status) for monitoring memory health, while the间歇性 execution minimizes interference with normal read/write operations, thereby maintaining productivity. The scan can be configured to run during low-activity periods or use background processing to reduce impact on foreground operations

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11705215B2Memory sub-system with background scan and histogram statistics
Publication Date: 2023.07.18 MICRON TECHNOLOGY INC
  • US11705215B2 patent drawing
  • US11705215B2 patent drawing
  • US11705215B2 patent drawing

AI summary

Several embodiments of systems incorporating memory sub-systems are disclosed herein. In one embodiment, a memory sub-system can include a memory component and a processing device configured to perform a background scan on a memory region of the memory component. In some embodiments, the background scan includes generating a bit error count (BEC) of a codeword saved on the memory region and saving statistical information corresponding to the BEC of the codeword to a histogram statistics log. In some embodiments, when the BEC of the codeword is greater than a BEC threshold, a refresh operation is scheduled for the memory region and/or logged. In these and other embodiments, when one or more error recovery error correction code (ECC) operations do not correct bit errors in the codeword, a refresh and/or retirement operation is schedule for the memory region and/or is logged.