Memory Subsystem Write Without Ownership Transfer

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Solution Overview

Problem

In computer systems with multiple devices accessing shared memory, the need to maintain data coherency through directory structures can lead to bus bandwidth limitations due to frequent memory writes and reads required to manage ownership and state changes.

Innovation Solution

Implementing a memory subsystem that allows I/O controllers to write data without needing ownership of the target line, thereby reducing the necessity for directory updates and minimizing bus traffic by using a buffer allocation mechanism that restricts write access to a single device, ensuring data coherency through cache invalidation and prioritizing write transactions over read transactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a directory structure is implemented to manage data ownership and coherency, then data coherency is maintained, but bus bandwidth is reduced due to frequent memory reads and writes of the directory

Engineering Contradiction:
Improvedata coherencyVSAvoidbus bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the ownership tracking function from the main directory structure by implementing a separate ownership bitmap. This bitmap is updated only when ownership actually changes, rather than updating the full directory structure on every memory access. This extraction reduces the frequency of directory writes and improves bus bandwidth while maintaining data coherency through the separate ownership tracking mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the directory management into two separate components: the main directory structure for data coherency and a separate ownership bitmap for tracking ownership. This segmentation allows independent optimization of each component, with the ownership bitmap requiring minimal updates and the directory structure maintaining coherency information, thereby reducing overall bus traffic.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple devices are permitted to write concurrently to the same line of data, then bus bandwidth is improved, but data coherency problems occur

Engineering Contradiction:
Improvebus bandwidthVSAvoiddata coherency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism - the ownership bitmap - that mediates between multiple devices wanting to write and the requirement for data coherency. The bitmap tracks which device owns each cache line, allowing the system to grant write permission to multiple devices over time while ensuring that at any given moment, only the owning device can modify the data, thus preventing coherency problems while enabling concurrent access.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements dynamic ownership assignment where the owning device for each cache line can change over time based on access patterns. The ownership bitmap is updated dynamically when ownership transfers occur, allowing the system to adapt to different access scenarios and enable multiple devices to write to different lines concurrently, improving overall bus bandwidth utilization.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7600079B2Performing a memory write of a data unit without changing ownership of the data unit
Publication Date: 2009.10.06 HEWLETT PACKARD ENTERPRISE DEV LP
  • US7600079B2 patent drawing
  • US7600079B2 patent drawing
  • US7600079B2 patent drawing

AI summary

A method comprises, while a first device has ownership of a data unit, a second device issuing a request to perform a memory write of said data unit. The method further comprises a memory controller performing the memory write without changing ownership to the second device.