Semiconductor Memory Noise Reduction via Switched Bias Control
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Solution Overview
Problem
Semiconductor memory devices face significant current consumption issues during sense amplifier operation, leading to rapid drops in core voltage due to abrupt current usage, which affects efficiency and noise interference.
Innovation Solution
Incorporating a first and second switch unit configuration in sub hole or edge regions to manage voltage lines, with control signals enabling external voltage application before and during sense amplifier operation, and ground voltage application during overdriving periods, to reduce noise and stabilize voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sense amplifier latch operates with core voltage (VCORE) as bias voltage, then sense amplifier can amplify bit line signals, but large amount of current is abruptly consumed causing core voltage to rapidly drop
Solution Approach 1:
The patent applies preliminary action by precharging the bit line pair to an intermediate voltage level (VBLP) before the sense amplifier operation begins. This precharging action reduces the voltage swing required during sense amplifier activation, thereby reducing the abrupt current consumption and core voltage drop that would otherwise occur when the sense amplifier latch switches from ground to core voltage.
2Measurement precision
If sense amplifier latch begins to operate, then bit line potentials change from slight potential difference to large potential difference, but noise interference increases due to abrupt current changes
Solution Approach 1:
The patent precharges the bit line pair to an intermediate voltage level before sense amplifier operation, which preliminarily establishes the signal levels and reduces the magnitude of voltage transitions during amplification. This preliminary action minimizes the electromagnetic interference and noise generated by abrupt current changes, thereby improving signal detection precision while reducing noise interference.
3Ease of operation
If external voltage (VDD) is supplied as core voltage (VCORE) by shorting during sense amplifier overdriving, then sense amplifier operation is enabled, but voltage stability deteriorates due to rapid voltage drops
Solution Approach 1:
The patent precharges the bit line pair to an intermediate voltage level before sense amplifier overdriving occurs. This preliminary action reduces the voltage swing requirement and minimizes the current demand during overdriving operation, thereby enabling sense amplifier functionality while reducing the magnitude of core voltage drops and improving overall voltage stability.
Data Source
AI summary
A semiconductor memory device having a reduced noise interference is presented. The semiconductor memory device includes a first switch and a second switch. The first switch is disposed in a sub hole region or an edge region and is configured to be turned on in response to a first pre-control signal, which is enabled before a time point at which a sense amplifier array begins to operate, and to apply an external voltage to a first voltage line through which a bias voltage is supplied to the sense amplifier array. The second switch is configured to be turned on in response to a first control signal, which is enabled in a sense amplifier overdriving period, and to apply the external voltage to the first voltage line.