Semiconductor Memory System Block Integration Density
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Solution Overview
Problem
Semiconductor memory devices face limitations in data storage capacity and integration density, particularly in 3D memory devices where system blocks have lower storage capacity compared to normal memory blocks, affecting overall performance and efficiency.
Innovation Solution
A semiconductor memory device architecture that includes a memory cell array with both normal and system blocks, where the system block has a reduced data storage capacity and is configured with a peripheral circuit to perform program, read, and erase operations, utilizing a common word line to couple part of the memory cells, allowing for simultaneous programming and reading of system data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If system blocks are included in 3D memory devices to store system data, then system data storage capability is improved, but overall data storage capacity is reduced
Solution Approach 1:
The memory device is divided into multiple independent blocks including normal memory blocks and system blocks. Each block can be independently accessed, programmed, and erased. The system blocks are further segmented into multiple pages, allowing selective access to different system data without affecting the entire block structure.
Solution Approach 2:
Different blocks within the memory device are assigned different functions with varying storage capacities. Normal memory blocks provide high-capacity user data storage, while system blocks provide lower-capacity system data storage. This local differentiation optimizes the overall device performance by matching storage capacity to functional requirements.
2Productivity
If part of memory cells are coupled to a common word line for simultaneous programming, then operational efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
Multiple memory cells that require the same system data are merged and coupled to a common word line. This allows simultaneous programming of these cells in a single operation, significantly improving operational efficiency. The same approach is used for simultaneous reading operations, where multiple cells can be read out together through the common word line.
Solution Approach 2:
The common word line serves multiple functions: it can be used for programming multiple memory cells simultaneously, for reading multiple memory cells simultaneously, and for erasing operations. This multi-functionality reduces the number of separate circuit elements needed, thereby managing manufacturing complexity while maintaining high operational efficiency.
Data Source
AI summary
A semiconductor memory device, and a method of operating the semiconductor memory device, includes a memory cell array including a plurality of normal memory blocks and at least one system block, and a peripheral circuit configured to perform a program operation, a read operation, or an erase operation on the plurality of normal memory blocks or the at least one system block, wherein a data storage capacity of the at least one system block is less than a data storage capacity of each of the plurality of normal memory blocks.