Memory System Bad Block Management via Program Loop Tracking

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Solution Overview

Problem

Memory devices face challenges in preventing program failures and managing bad blocks effectively, particularly due to the lack of efficient methods to track and update the maximum number of program loops across memory blocks, leading to potential data storage issues in portable electronic devices.

Innovation Solution

A memory system that performs program loops in stages, updates the maximum number of program loops for each memory block by comparing the number of successful and failed loops, and manages blocks as bad blocks based on these counts using a controller with a check circuit, update circuit, and storage circuit, employing an incremental step pulse program scheme.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the maximum number of program loops is not tracked and updated, then the device complexity is reduced, but program failures cannot be prevented and bad blocks cannot be managed effectively

Engineering Contradiction:
Improveprogram failure preventionVSAvoidtracking and update mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by proactively tracking the number of program loops during the programming process and identifying bad blocks before they cause failures. The system monitors program loop counts in advance and designates blocks as bad blocks when thresholds are reached, preventing future program failures rather than reacting after failures occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously monitoring the number of program loops performed on each memory block and using this information to update the maximum program loop count. This feedback mechanism allows the system to adaptively manage bad blocks based on actual programming performance, improving reliability through data-driven decisions.

Inventive Principle:
Principle #23Feedback

2Reliability

If program loops are performed in stages with verification, then program failure prevention is improved, but the time required for programming increases

Engineering Contradiction:
Improveprogram operation reliabilityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing verification operations on selected pages rather than all pages in a memory block. The system selectively verifies pages based on programming status and updates maximum program loop counts for blocks where verification indicates potential issues, achieving reliable bad block management without the time cost of exhaustive verification.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11508448B2Memory system including memory device and operating method thereof
Publication Date: 2022.11.22 SK HYNIX INC
  • US11508448B2 patent drawing
  • US11508448B2 patent drawing
  • US11508448B2 patent drawing

AI summary

A memory system including a memory device suitable for performing, in stages, a program loop including a program operation and a program verification operation on each page within a memory block selected among a plurality of memory blocks, updating a maximum number of program loops for the selected memory block by comparing a number of program loops on each page, which are performed until the program verification operation is processed as a pass on the page, with a current maximum number of program loops for the selected memory block, and storing the updated maximum number of program loops for the selected memory block as program pass information of the selected memory block; and a controller suitable for managing the selected memory block as a bad block based on the program pass information of the selected memory block.