Semiconductor Memory Termination Circuit Dynamic Voltage Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current NAND memory devices face challenges in efficiently transferring data, commands, and addresses due to power consumption issues and the need for different termination systems, which complicates the setting of a single reference voltage for both POD and open terminal modes.
Innovation Solution
A semiconductor memory device with a termination circuit that switches between POD and open terminal modes based on a POD enable signal, using a reference voltage generation circuit to generate different reference voltages for each mode, allowing for high-speed data transfer while reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a termination circuit uses a fixed reference voltage for both POD and open terminal modes, then the circuit structure is simple, but the operating speed decreases and power consumption increases
Solution Approach 1:
The patent applies dynamics by making the reference voltage generation circuit switchable between different operating states. The circuit dynamically adjusts the reference voltage based on the termination mode (POD or open terminal) through a mode selection signal, enabling optimal performance for each mode while maintaining a unified circuit structure.
Solution Approach 2:
The patent changes the reference voltage parameter according to the termination mode. By adjusting the reference voltage level based on whether the system is in POD mode or open terminal mode, the circuit achieves optimized signal recognition and reduced power consumption for each specific operating condition.
2Speed
If the termination circuit always uses POD mode, then high-speed data transfer is achieved, but power consumption increases
Solution Approach 1:
The system dynamically switches between POD mode and open terminal mode based on the operation type. Data transfer operations utilize POD mode for high speed, while command and address transfers use open terminal mode for lower power consumption, achieving optimal energy-performance balance through dynamic mode selection.
3Productivity
If different termination systems are used for different modes, then optimal performance for each mode is achieved, but the circuit structure becomes complex
Solution Approach 1:
The patent implements a universal termination circuit that can function in both POD mode and open terminal mode. By using a single multi-functional circuit with switchable reference voltage generation, the system achieves optimal performance for both modes without requiring separate dedicated circuits for each mode.
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a memory including a memory cell array, and an input/output pin configured to transfer data, a command, and an address from an external to the memory. The memory includes a termination circuit provided between the input/output pin and the memory cell array, and configured to supply a first voltage having a first amplitude in a first transfer mode and supply a second voltage having a second amplitude in a second transfer mode, a first intermediate value of the first amplitude being different from a second intermediate value of the second amplitude.