Memory Test Circuitry with Delayed Sensing for Voltage Optimization
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Solution Overview
Problem
Memories operate differently at various voltages and localities within a multi-core chip, leading to performance limitations due to slower local memories, necessitating a system for testing and configuring memory operation at optimal parameters.
Innovation Solution
A data processing system that dynamically adjusts operating voltage and tests memory operation at different voltages by using a memory configuration controller and low power control circuit to determine effective voltage and frequency settings, incorporating write and read test circuits with delayed sensing characteristics to assess memory performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory operates at higher voltages, then operation speed is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the operating voltage of memory based on tested characteristics. The system determines optimal voltage parameters through testing and modifies the operating voltage to achieve the lowest voltage that still maintains effective operation, thereby reducing power consumption while preserving operational speed within acceptable ranges.
2Productivity
If memory operates at higher clock frequencies, then system performance is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the clock frequency of memory based on tested characteristics. The system determines optimal frequency parameters through testing and modifies the operating frequency to achieve the highest frequency that maintains effective operation, thereby improving system performance while managing power consumption.
3Productivity
If memory operates at uniform voltage across all localities, then system simplicity is maintained, but peak performance is limited by slower local memories
Solution Approach 1:
The patent applies local quality by enabling different operating voltages for different localities or banks of memory based on their specific characteristics. The testing mechanism identifies performance characteristics of specific memory regions, and the system configures each region to operate at its optimal voltage, allowing faster memory regions to run at higher voltages for improved peak performance while maintaining overall system functionality.
Data Source
AI summary
Test circuitry for determining whether a memory can operate at a lower operating voltage. The test circuitry includes a sense circuit having a delayed sensing characteristic as compared to other sense amplifier circuits of the memory. With this circuitry, the test circuitry can determine if the sense circuit can provide valid data under more severe sensing conditions. In one example, the sense circuit includes a delay circuit in the sense enable signal path. If sense circuit can provide data at more server operating conditions, then the memory operating voltage can be lowered.