Memory Testing Device Cross Interconnection Drivers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional memory testing devices require multiple sets of testing fixtures for different I/O configurations, leading to increased capital investment and reduced testing efficiency due to the need for fixture interchange.

Innovation Solution

A memory testing device with cross interconnection of multiple drivers, utilizing additional wiring buses to connect and synchronize testing patterns across DUTs with different I/O configurations without changing fixtures, allowing for simultaneous testing of DUTs with x4 and x8 configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple sets of testing fixtures are prepared for different I/O configurations, then testing coverage for different configurations is improved, but capital investment increases and testing efficiency decreases due to fixture interchange requirements

Engineering Contradiction:
Improvetesting coverage for different I/O configurationsVSAvoidtesting efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements a universal testing fixture that can test both x4 and x8 I/O configurations simultaneously through cross-interconnection of drivers. The fixture includes a first driver module with first and second drivers, and a second driver module with third and fourth drivers, where cross-interconnections allow any driver to control any I/O pin regardless of configuration type, eliminating the need for multiple dedicated fixtures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The testing fixture is divided into multiple independent driver modules (first driver module with first/second drivers, second driver module with third/fourth drivers) that can be independently controlled and configured. This segmentation allows flexible assignment of drivers to different I/O configurations and enables parallel testing of multiple DUTs with different configurations

Inventive Principle:
Principle #1Segmentation

2Reliability

If testing fixtures are interchanged for different I/O configurations, then accurate testing for specific configurations is improved, but testing speed decreases due to unloading and reloading operations

Engineering Contradiction:
Improvetesting accuracy for specific configurationsVSAvoidtesting speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The universal testing fixture allows continuous testing operations without interruption for configuration changes. Multiple DUTs with different I/O configurations can be tested simultaneously in parallel, eliminating the stop-start nature of fixture interchange and maintaining continuous testing throughput

Inventive Principle:
Principle #20Continuity of useful action

3Measurement precision

If dedicated circuitry is implemented for each I/O configuration, then testing precision for specific configurations is improved, but device complexity increases

Engineering Contradiction:
Improvetesting precision for specific configurationsVSAvoidfixture circuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements dynamic configuration capability where the same physical fixture can be reconfigured for different I/O configurations through software control of driver assignments. The cross-interconnection architecture allows drivers to be dynamically assigned to different I/O pins based on the DUT configuration, providing precision for specific configurations without dedicated hardware for each configuration type

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8559252B2Memory testing device having cross interconnections of multiple drivers and its implementing method
Publication Date: 2013.10.15 POWERTECH TECHNOLOGY INC
  • US8559252B2 patent drawing
  • US8559252B2 patent drawing
  • US8559252B2 patent drawing

AI summary

Disclosed is a memory testing device having cross interconnections of multiple drivers, comprising a first wiring bus and a second wiring bus connected to a first device area and a third wiring bus and a fourth wiring bus connected to a second device area. A first I/O driver module is connected to the first wiring bus through a first driving bus. A second I/O driver module is connected to the third wiring bus through the second driving bus. The fourth wiring bus is Y-shaped connected to the node between the first wiring bus and first driving bus. And, the second wiring bus is Y-shaped connected to the node between the third wiring bus and the second driving bus.