Memory Read Threshold Binning by Page Type for Lower Bit Errors
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Solution Overview
Problem
Conventional memory sub-systems face inefficiencies due to a one-size-fits-all approach in selecting read threshold voltage offsets for different page types, leading to sub-optimal bit error rates and potential data loss.
Innovation Solution
A memory sub-system controller dynamically associates different page types with respective BFEA bins based on slow charge loss and read bit error rate analysis, optimizing read threshold adjustments for improved efficiency and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a one-size-fits-all approach is used to select read threshold voltage offsets for all page types, then the device complexity is reduced and ease of operation is improved, but the read bit error rate increases and data integrity deteriorates
Solution Approach 1:
The patent segments the memory page types into different categories (e.g., first page type, second page type, third page type) and assigns distinct read threshold voltage offset selections to each segment. This segmentation allows optimized error correction for each page type while maintaining manageable complexity through systematic classification.
Solution Approach 2:
The patent applies local quality by selecting different read threshold voltage offsets tailored to specific page types rather than using a uniform approach. Each page type receives customized threshold adjustments based on its characteristics, improving local error correction effectiveness without requiring complete system redesign.
2Reliability
If page type-specific read threshold adjustments are implemented, then the read bit error rate is reduced and data integrity is improved, but the device complexity and operational complexity increase
Solution Approach 1:
The patent implements dynamic read threshold voltage offset selection that adapts based on the detected page type. The system dynamically adjusts thresholds during operation rather than using fixed values, enabling optimized error correction for varying page types while maintaining ease of operation through automated detection and adjustment.
Solution Approach 2:
The patent employs feedback mechanisms where the system detects the page type and automatically selects the appropriate read threshold voltage offset based on pre-established associations. This feedback loop ensures optimal error correction without requiring manual intervention, balancing improved reliability with ease of operation.
3Productivity
If dynamic page type analysis and BFEA bin association is performed, then the read operations become more efficient and accurate, but the processing time and operational complexity increase
Solution Approach 1:
The patent performs preliminary analysis during manufacturing or initialization to establish the associations between page types and BFEA bins. By pre-determining these relationships, the system eliminates the need for time-consuming analysis during actual read operations, thereby improving read operation efficiency without sacrificing accuracy.
Solution Approach 2:
The patent changes the parameter of read threshold voltage offsets based on page type identification. By systematically varying this parameter according to pre-established page type associations, the system achieves optimized read efficiency and accuracy while minimizing processing time through straightforward parameter selection rather than complex real-time calculations.
Data Source
AI summary
The present disclosure configures a system component, such as memory sub-system controller, to determine read thresholds for memory blocks. The controller selects a group of memory blocks stored in a set of memory components and determines that the group of memory blocks is associated with a current bin of a plurality of bins, each bin of the plurality of bins comprising a respective plurality of read threshold offsets. The controller samples data stored in the group of memory blocks across different page types using the current bin and, in response to sampling the data, associates the different page types of the group of memory blocks with respective pointers to different bins of the plurality of bins for subsequently reading data from the group of memory blocks.