Nonvolatile Memory Transistor Threshold Voltage Control

Solution Overview

Problem

Current nonvolatile memory devices face challenges in efficiently managing threshold voltages of selection transistors to optimize operation voltages and data storage in NAND string configurations, leading to suboptimal performance in programming, reading, and erasing operations.

Innovation Solution

The proposed nonvolatile memory device incorporates a selection line driver with path transistors that provide distinct operation voltages to string selection and ground selection transistors, allowing for differential threshold voltage management and improved control over selection lines, enabling efficient data storage and retrieval by setting threshold voltages of ground and string selection transistors differently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the same threshold voltage is used for both string selection transistor and ground selection transistor, then the device structure is simplified, but the operational efficiency and control precision are reduced

Engineering Contradiction:
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies local quality by assigning different threshold voltages to different transistors within the NAND string structure. Specifically, the string selection transistor has a first threshold voltage while the ground selection transistor has a second threshold voltage, allowing each transistor to be optimized for its specific functional requirements in the memory operation process

Inventive Principle:
Principle #3Local quality

2Productivity

If distinct threshold voltages are assigned to string selection transistor and ground selection transistor, then the control precision and operational efficiency are improved, but the device complexity increases

Engineering Contradiction:
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements parameter changes by modifying the threshold voltage parameter of the transistors. The string selection transistor is designed with a first threshold voltage and the ground selection transistor with a second threshold voltage, enabling precise control over transistor switching behavior during read, write, and erase operations to optimize memory performance

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the threshold voltage of ground selection transistor is set higher than string selection transistor, then the selection control is improved, but the ease of operation is reduced due to more complex voltage management

Engineering Contradiction:
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies dynamics by implementing dynamic voltage management where different voltage levels are applied to the string selection line and ground selection line during different operations. The string selection line receives a first operation voltage while the ground selection line receives a second operation voltage, allowing flexible control of transistor states based on the current operational mode (read, write, or erase)

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8891307B2Nonvolatile memory device and memory system including the same
Publication Date: 2014.11.18
  • US8891307B2 patent drawing
  • US8891307B2 patent drawing
  • US8891307B2 patent drawing

AI summary

According to example embodiments of inventive concepts, a nonvolatile memory device includes a first NAND string and a second NAND string. The first NAND string include a first string selection transistor, a first ground selection transistor having a threshold voltage higher than a threshold voltage of the first string selection transistor, and first memory cells stacked on a substrate. The a second NAND string includes a second string selection transistor, a second ground selection transistor having a threshold voltage higher than a threshold voltage of the second string selection transistor, and second memory cells stacked on the substrate. A first selection line may connect the first string selection line and the first ground selection line, and a second selection line may connect the second selection line and the second ground selection line. The first and second selection lines may be electrically isolated from each other.