Memory Device Variable Read Voltage Optimization

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Solution Overview

Problem

Conventional memory device read methods face challenges due to varying responses of different memory cells to predetermined read voltages, leading to read errors, especially due to usage and electrical noise differences.

Innovation Solution

A method involving multiple read operations with varying voltages is performed on memory device storage regions, using different error correction rates to determine the optimal read voltage level that minimizes erroneous bits, allowing for accurate data retrieval across different memory cell states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a predetermined read voltage is applied to all memory cells, then the read operation is simple and fast, but read errors occur due to varying responses of different memory cells

Engineering Contradiction:
Improveread accuracyVSAvoidread operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple storage regions, each with its own optimized read voltage. This segmentation allows each region to be read with a voltage tailored to its specific characteristics, improving read accuracy without requiring complex per-cell voltage adjustment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The read voltage parameter is changed and optimized for different storage regions based on their individual characteristics. By adjusting the voltage parameter at the region level rather than using a fixed voltage for all cells, the system achieves higher reliability while maintaining operational simplicity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If higher error correction rate is applied to all storage regions, then read errors are better corrected, but processing overhead and time increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Different error correction rates are applied to different storage regions based on their specific error characteristics. Regions with higher error rates receive stronger error correction, while regions with lower error rates use lighter correction, optimizing the balance between reliability and processing efficiency.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The error correction rate parameter is varied across different storage regions according to their individual needs. This parameter optimization ensures that error correction resources are allocated efficiently, improving overall system reliability without unnecessary processing overhead.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple read operations with different voltages are performed to find optimal voltage, then read accuracy improves, but operation time increases

Engineering Contradiction:
Improvevoltage optimization precisionVSAvoidvoltage detection time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The voltage optimization process is segmented and performed separately for each storage region. Once the optimal voltage is determined for a region, it can be reused for subsequent read operations in that region, reducing the overall time penalty compared to determining optimal voltage for every read operation across the entire device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The optimal read voltage for each storage region is determined in advance through preliminary measurements. This preliminary action allows the system to store and reuse the optimized voltage values, avoiding the need to perform multiple voltage sweeps during every read operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9190160B2Memory device having variable read voltage and related methods of operation
Publication Date: 2015.11.17 SAMSUNG ELECTRONICS CO LTD
  • US9190160B2 patent drawing
  • US9190160B2 patent drawing
  • US9190160B2 patent drawing

AI summary

A method of determining a read voltage of a memory device includes performing a plurality of read operations with respective different read voltages on a first group of storage regions of the memory device using a first error correction rate, wherein the plurality of read operations are performed to distinguish between a pair of adjacent logic states of memory cells in the first group of storage regions, detecting a read voltage level, among the different read voltages, at which a minimum number of erroneous bits is generated in the at least one read operation, and determining a read voltage for a second group of storage regions to which a second error correction rate is applied, based on the detected read voltage level, wherein the first error correction rate is higher than the second error correction rate.