In-Memory Vector Multiplication Using Sense Amplifier Logic

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Solution Overview

Problem

Existing memory devices require significant power and time to perform multiplication operations, as they often need to transfer data between memory arrays and processing resources, leading to inefficiencies even when these resources are located on the same chip.

Innovation Solution

The solution involves performing multiplication operations directly within the memory array using sensing circuitry, eliminating the need to transfer data via I/O lines by executing AND, OR, and SHIFT operations within the memory array, thereby reducing computational time and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If multiplication operations are performed using external processing resources, then computational accuracy is maintained, but power consumption and access time increase due to data transfer between memory array and processing resources

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transfer infrastructure
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent combines the memory array and processing resources into a single integrated structure where multiplication operations are performed directly within the memory array. The sense amplifier is modified to include multiplication circuitry that operates on data while it resides in the memory array, eliminating the need to transfer data to external processing resources. This merging of storage and computation functions resolves the contradiction by maintaining computational accuracy while reducing power consumption and eliminating data transfer infrastructure.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If data is transferred between memory array and processing resources, then operations can be executed, but access time increases

Engineering Contradiction:
Improveoperation executionVSAvoidaccess time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by performing multiplication operations directly on data while it is stored in the memory array, before any data transfer occurs. The sense amplifier detects and multiplies data values in-place during the normal memory access operation, so that computation is completed as part of the data retrieval process itself. This eliminates the sequential overhead of transfer-then-compute, thereby maintaining productivity while minimizing access time.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If multiplication operations are performed within the memory array, then power consumption and access time are reduced, but device complexity increases

Engineering Contradiction:
Improvecomputational timeVSAvoidsensing circuitry complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the sense amplifier to perform multiple functions: traditional data detection and retrieval, plus multiplication operations. The same sense amplifier circuitry that normally reads data from the memory array is enhanced to simultaneously perform multiplication on the retrieved data. This multi-functionality allows the system to achieve faster computation without adding separate dedicated multiplication units, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory array performs multiplication operations on its own stored data through the enhanced sense amplifier, without requiring external processing resources. The system serves its own computational needs internally, with the memory array's sensing circuitry providing both data retrieval and computation services. This self-service approach reduces the need for additional complex external infrastructure while achieving faster computational times.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10705798B2Multiplication operations in memory
Publication Date: 2020.07.07 MICRON TECHNOLOGY INC
  • US10705798B2 patent drawing
  • US10705798B2 patent drawing
  • US10705798B2 patent drawing

AI summary

Examples of the present disclosure provide apparatuses and methods for performing multi-variable bit-length multiplication operations in a memory. An example method comprises performing a multiplication operation on a first vector and a second vector. The first vector includes a number of first elements stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array. The second vector includes a number of second elements stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array. The example multiplication operation can include performing a number of AND operations, OR operations and SHIFT operations without transferring data via an input/output (I/O) line.