Nonvolatile Memory Verify Read Using Single Current Classification
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Solution Overview
Problem
The existing QPW method for nonvolatile semiconductor memory requires two verify read operations, increasing write time, especially in multi-level cell operations.
Innovation Solution
A nonvolatile semiconductor memory system that classifies the threshold voltage of a selected memory cell into three groups using a single verify read operation by detecting the magnitude of the cell current, eliminating the need for two separate verify read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If two verify read operations are performed to classify threshold voltage into three groups, then classification accuracy is improved, but write time increases
Solution Approach 1:
The patent segments the cell current verification process into three distinct current magnitude ranges, each corresponding to a threshold voltage group. By measuring the cell current once and comparing it against three predefined thresholds, the method achieves three-group classification without requiring two separate verify read operations, thus resolving the contradiction between classification accuracy and write time
Solution Approach 2:
The patent changes the verification parameter from multiple voltage-level verify reads to a single current-magnitude measurement. By applying a unified read potential and measuring the resulting cell current magnitude, the system can determine which of the three threshold voltage groups the memory cell belongs to, eliminating the need for sequential verify reads at different potentials and reducing write time while maintaining classification accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces write time by shortening the verify read time, enabling faster write operations.
Implementation Method 1
a nonvolatile semiconductor memory in which one cell unit is composed of a plurality of memory cells
Implementation Method 2
a control circuit which classifies a threshold voltage of the selected memory cell to one of three groups by verifying which area among three area which are isolated by two values does a cell current of the selected memory cell belong
Data Source
AI summary
A memory includes first and second select gate transistors, memory cells, a source line, a bit line, a selected word line which is connected to a selected memory cell as a target of a verify reading, a non-selected word line which is connected to a non-selected memory cell except the selected memory cell, a potential generating circuit for generating a selected read potential which is supplied to the selected word line, and generating a non-selected read potential larger than the selected read potential, which is supplied to the non-selected word line, and a control circuit which classifies a threshold voltage of the selected memory cell to one of three groups by verifying which area among three area which are isolated by two values does a cell current of the selected memory cell belong, when the selected read potential is a first value.