Non-Volatile Memory Verify Voltage Adjustment for Coupling
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Solution Overview
Problem
High-density non-volatile memory systems face challenges with electrostatic coupling and electron diffusion leading to data degradation and increased bit error rates due to the compact and stacked nature of memory cells, which existing error correction methods fail to adequately address during programming operations.
Innovation Solution
A method that involves reading the data pattern of neighboring memory cells and adjusting the verify voltage level during the programming operation of a target memory cell based on the stored data pattern of these neighboring cells to predictively compensate for electrostatic coupling and electron diffusion effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are compacted and stacked to increase storage density, then storage capacity is improved, but electrostatic coupling and electron diffusion cause data degradation and increased bit error rates
Solution Approach 1:
The patent reads the data pattern of neighboring memory cells before programming the target memory cell, and uses this information to adjust the verify voltage level during programming. This preliminary action allows the system to predictively compensate for electrostatic coupling and electron diffusion effects that will occur due to the compact stacked structure, thereby maintaining data integrity while achieving high storage density
Solution Approach 2:
The patent dynamically adjusts the verify voltage level parameter during the programming operation based on the neighboring data pattern. By changing this voltage parameter in response to detected neighboring cell states, the system compensates for the harmful electrostatic coupling effects inherent in high-density stacked memory structures, resolving the contradiction between density and reliability
2Reliability
If verify voltage level is adjusted based on neighboring data patterns, then bit error rates are reduced, but programming operation complexity increases
Solution Approach 1:
The patent implements a feedback mechanism where the data pattern of neighboring memory cells is read and used to determine the appropriate verify voltage level for programming the target cell. This feedback loop allows the system to adaptively adjust programming parameters based on actual neighboring cell states, improving programming accuracy while keeping the complexity manageable through a straightforward read-adjust-program sequence
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability and durability of programmed data by reducing lateral shifts in threshold voltage distributions and bit error rates, maintaining the efficiency and scale of high-density memory structures.
Implementation Method 1
predictively compensating for the deleterious effects of electrostatic coupling and electron diffusion to the programmed data
Implementation Method 2
predictively compensating for the deleterious effects of electrostatic coupling and electron diffusion to the programmed data
Data Source
AI summary
A method for programming a target memory cell of a memory array of a non-volatile memory system, the method comprising performing a read operation of one or more memory cells neighboring a target memory cell, thereby determining a data pattern of the one or more neighboring memory cells, storing the data pattern and, during a program operation of the target memory cell, adjusting a verify voltage level according to the stored data pattern of the one or more neighboring memory cells.