Nonvolatile Memory Verify Voltage Adjustment for Thermal Stress

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Solution Overview

Problem

Nonvolatile semiconductor memory devices experience erroneous reading faults due to thermal stress during packaging, which causes a shift in the threshold values of memory cells, leading to data corruption, especially in multi-level memory systems where micronization advances exacerbate this issue.

Innovation Solution

A nonvolatile semiconductor memory device and system that utilize a voltage generation unit to apply a first verify voltage during writing before a thermal process and a second, lower verify voltage after the thermal process, ensuring accurate data retention and reliable reading by controlling the threshold value distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a high verify voltage is used during writing before thermal process, then writing accuracy is improved, but data retention after thermal process deteriorates due to threshold value shift

Engineering Contradiction:

Improvewriting accuracyVSAvoiddata retention after thermal process

Core Design Contradiction:

Measurement precisionVSReliability

Solution Approach 1:

The verify voltage is made dynamic and adjustable based on the thermal process state. The control circuit switches between a first verify voltage (higher) for pre-thermal writing and a second verify voltage (lower) for post-thermal writing, allowing the system to adapt to threshold value shifts caused by thermal stress while maintaining both writing accuracy and data retention

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the verify voltage parameter based on the thermal process state. By detecting whether the memory device has undergone thermal processing and adjusting the verify voltage accordingly, the system compensates for threshold value shifts while maintaining reliable data storage and reading operations

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If multi-level memory system is implemented to enlarge capacity, then storage capacity is improved, but susceptibility to thermal stress-induced reading errors increases

Engineering Contradiction:

Improvestorage capacityVSAvoidreading accuracy after thermal process

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The control circuit dynamically adjusts the verify voltage based on the thermal process state, switching between higher pre-thermal verify voltage and lower post-thermal verify voltage. This dynamic adjustment compensates for the increased sensitivity of multi-level memory cells to thermal stress, maintaining reading accuracy across different storage levels

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system incorporates feedback by detecting the thermal process state and using this information to adjust the verify voltage accordingly. This feedback mechanism ensures that the verify voltage is optimized for the current operational state, preventing reading errors in multi-level memory cells affected by thermal stress

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS8274836B2Nonvolatile semiconductor memory device and nonvolatile semiconductor memory system

Publication Date: 2012.09.25 KIOXIA CORP

AI summary

A nonvolatile semiconductor memory device and a nonvolatile memory system having a unit which suppresses erroneous reading of a nonvolatile semiconductor memory device of a multi-level memory system are provided. In the nonvolatile semiconductor memory device and the nonvolatile memory system of the multi-level memory system, a first verify voltage is used when data is written before a packaging process, and the verify voltage is switched to a second verify voltage lower than the first verify voltage when data is written after the packaging process.