Memory Device Voltage Control for Read Margin
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Solution Overview
Problem
The reliability of data stored in nonvolatile memory devices is reduced due to memory cell characteristics, particularly because existing programming methods using incremental step pulse programming (ISPP) do not effectively secure sufficient read margins, leading to inconsistent data recognition across multi-level cells.
Innovation Solution
A memory device and system that includes a voltage generator and controller to apply and adjust verifying voltages based on temperature information and programming states, with the voltage controller gradually decreasing verifying voltage levels as the program loop count increases, ensuring consistent data verification across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If incremental step pulse programming (ISPP) is used to program memory cells, then programming states can be verified, but the read margin is insufficient and data reliability is reduced
Solution Approach 1:
The patent applies preliminary action by performing a verifying operation before the main programming operation to determine an initial verifying voltage level. This preliminary verification allows the system to adjust subsequent verifying voltage levels dynamically, ensuring adequate read margins are established early in the programming process, which directly addresses the insufficient read margin problem in conventional ISPP methods
Solution Approach 2:
The patent implements dynamics by making the verifying voltage level adjustable and adaptive throughout the programming loops. The voltage controller dynamically changes verifying voltage levels based on temperature information and programming progress, transforming the static verifying voltage approach into a dynamic one that maintains optimal read margins across varying conditions, thereby improving both measurement precision and reliability
2Reliability
If verifying voltage levels remain constant across programming loops, then the verification process is simple, but data reliability deteriorates due to temperature variations and memory cell characteristics
Solution Approach 1:
The patent applies feedback by continuously monitoring temperature information and programming loop progress, then using this feedback to adjust verifying voltage levels in subsequent loops. The voltage controller receives feedback about current conditions and modifies the verifying voltage accordingly, creating a closed-loop control system that maintains data reliability without requiring overly complex voltage control mechanisms
Solution Approach 2:
The patent implements parameter changes by varying the verifying voltage level as a function of programming loop count and temperature conditions. Instead of using a fixed voltage, the system changes the voltage parameter dynamically based on observed memory cell behavior and environmental factors, improving reliability while keeping the control logic manageable through systematic parameter adjustment
3Measurement precision
If multiple verifying voltages are applied in each programming loop, then programming states can be accurately verified, but the programming time increases
Solution Approach 1:
The patent applies partial action by performing a preliminary verifying operation with a first verifying voltage level before the main programming operation, rather than applying multiple full verification cycles during each programming loop. This partial verification approach provides sufficient state confirmation without the time penalty of repeated comprehensive verifications, balancing measurement precision with time efficiency
Data Source
AI summary
A memory device includes a memory cell array including a plurality of memory cells on which a programming loop is executed a plurality of times; a voltage generator configured to apply a verifying voltage to the memory cells, for verifying at least one programming state of the memory cells; and a voltage controller configured to control the voltage generator to change a level of the verifying voltage as a program loop count increases, based on temperature information about a temperature inside or outside the memory device.