Semiconductor Memory Voltage Generation Blocks for Bit Line Precharge
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Solution Overview
Problem
Conventional semiconductor memory apparatuses face challenges in reducing the time required to store data efficiently at higher speeds while maintaining low power consumption, as they rely solely on program voltage for data storage, leading to longer data storage times and potential reliability issues due to varying distances of memory cells from the bit line.
Innovation Solution
The semiconductor memory apparatus incorporates a program voltage generation block and a precharge voltage generation block, which generate program and precharge voltages respectively, applied to a main bit line to facilitate faster data storage by controlling voltage levels based on program codes and addresses, thereby optimizing the voltage transfer to memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If only program voltage is applied to the main bit line for data storage, then the device complexity is low, but the data storage time is extended and reliability is reduced due to varying distances of memory cells from the bit line
Solution Approach 1:
The voltage generation function is segmented into two independent blocks: a program voltage generation block and a precharge voltage generation block. Each block independently generates specific voltage levels applied to the main bit line, allowing optimized voltage control for different memory cell distances without increasing overall system complexity
Solution Approach 2:
Different voltage levels are applied to the main bit line based on the distance of memory cells from the bit line. The precharge voltage generation block generates voltage levels specifically tailored for memory cells at different distances, ensuring consistent voltage delivery and improved reliability without requiring complex global voltage control
2Reliability
If higher voltage levels are applied to extend the reach to distant memory cells, then the voltage delivery to distant cells is improved, but the power consumption increases
Solution Approach 1:
The precharge voltage generation block changes the voltage level parameter dynamically based on the address information. When memory cells farther from the bit line are accessed, higher voltage levels are applied; when closer cells are accessed, lower voltage levels suffice. This parameter adaptation ensures reliable voltage delivery while minimizing power consumption
3Reliability
If the main bit line is designed to reach all memory cells, then the coverage is complete, but the time required for voltage to reach distant cells is extended
Solution Approach 1:
The precharge voltage generation block performs preliminary voltage preparation by generating appropriate voltage levels before data storage operations. This preliminary action ensures that the main bit line is pre-charged to the correct voltage level, reducing the time required for voltage to propagate to distant memory cells during actual data storage operations
Data Source
AI summary
A semiconductor memory apparatus may include a program voltage generation block configured to generate a program voltage in response to program codes; a precharge voltage generation block configured to generate a precharge voltage in response to the program codes and addresses; and a main bit line configured to be applied with the program voltage and the precharge voltage.