Semiconductor Memory Voltage Generation Control for Test Stability
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Solution Overview
Problem
Semiconductor memory devices face challenges in stabilizing internal voltage supply, particularly during test modes at the wafer level, where the longer operation period necessitates improved power supply stability to enhance performance, while minimizing current consumption at the package level.
Innovation Solution
The semiconductor memory device incorporates multiple internal voltage generation units enabled by decoding signals, a controller for generating control signals based on power up and test mode signals, and a decoder to activate these signals, allowing for simultaneous activation of decoding signals and voltage generation units during the test mode, and optimized voltage allocation during normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple internal voltage generation circuits are simultaneously enabled during test mode, then power supply stability is improved, but current consumption increases
Solution Approach 1:
The patent implements dynamic control of voltage generation circuits based on operational mode. During test mode, multiple voltage generation circuits are simultaneously enabled to provide stable power supply. During normal operation mode, only the voltage generation circuit corresponding to the selected bank is enabled. This dynamic switching resolves the contradiction by adapting the number of active circuits to the specific operational requirements.
Solution Approach 2:
The patent changes the operational parameters of the voltage generation circuits based on the mode signal. In test mode, the system sets multiple enable signals to activate state to ensure stable voltage supply across all banks. In normal operation, the system switches to selective activation based on bank address decoding. This parameter change strategy allows the system to optimize between stability and power consumption depending on operational context.
2Use of energy by moving object
If a single internal voltage generation circuit is allocated to each bank group, then current consumption is minimized, but power supply stability deteriorates during test mode
Solution Approach 1:
The patent employs dynamic configuration of voltage generation circuits based on operational mode. During test mode, the system transitions from single-circuit operation to multi-circuit simultaneous operation to ensure adequate power supply to all banks. During normal operation, the system maintains single-circuit operation for each bank group to minimize power consumption. This dynamic reconfiguration resolves the contradiction between power efficiency and test mode stability requirements.
Solution Approach 2:
The voltage generation circuits are designed to serve multiple functions depending on operational mode. The same circuits that normally operate independently for individual banks are capable of simultaneous operation during test mode to provide universal power supply coverage. This multi-functionality allows the system to achieve both power efficiency during normal operation and stability during testing.
3Use of energy by moving object
If decoding circuit activates only selected bank's voltage generation circuit, then power consumption is reduced, but test operation verification becomes difficult
Solution Approach 1:
The decoding circuit implements dynamic behavior based on mode signals. During test mode, the decoding circuit is configured to simultaneously activate all voltage generation circuits regardless of bank address selection, enabling comprehensive test operations. During normal operation, the decoding circuit returns to selective activation based on decoded bank addresses. This dynamic switching resolves the contradiction between power efficiency and testability.
Solution Approach 2:
The system prepares the voltage generation circuits for simultaneous activation before test operations begin. The mode signal detects test mode conditions in advance and pre-configures the decoding circuit to enable all voltage generation circuits. This preliminary action ensures that all circuits are ready for verification before testing starts, making operation detection and measurement easier during test mode.
Data Source
AI summary
Disclosed is a semiconductor memory device, including a plurality of internal voltage generation units configured to be enabled in response to each of a plurality of decoding signals and to generate an internal voltage, a controller configured to generate a plurality of control signals in response to a power up signal and a test mode signal, and a decoder configured to generate the plurality of decoding signals corresponding to at least one decoding source signal and to simultaneously activate some or all of the plurality of decoding signals in response to the control signals.