Semiconductor Memory Device Voltage Control for Hole Removal
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Solution Overview
Problem
Semiconductor memory devices face challenges in improving electrical characteristics due to holes remaining in the channel of unselected memory blocks, which affect the performance during program verify operations.
Innovation Solution
A semiconductor memory device design that includes a voltage supply circuit generating operating voltages and a set voltage, applied through a pass circuit to word lines of both selected and unselected memory blocks, effectively removing holes in unselected memory blocks by using a control logic to manage these voltages during program verify operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple memory blocks share a single block decoder to reduce device complexity, then device complexity is reduced, but holes remain in the channel of unselected memory blocks during program verify operations, degrading electrical characteristics
Solution Approach 1:
The patent segments the memory blocks into selected and unselected groups, applying different voltage treatments. The control logic circuit divides the memory blocks based on selection status, allowing differentiated voltage application to remove holes from unselected blocks while maintaining normal operation in selected blocks.
Solution Approach 2:
The patent changes the voltage parameter applied to unselected memory blocks during program verify operations. By applying a specific voltage (e.g., 0V or negative voltage) to unselected blocks, holes in their channels are removed, thereby improving electrical characteristics without affecting the selected block operation.
2Reliability
If a set voltage is applied to unselected memory blocks during program verify operations to remove holes, then electrical characteristics are improved, but additional voltage control complexity is introduced
Solution Approach 1:
The control logic circuit performs multiple functions: it generates block select signals for the block decoder, monitors operation status, and generates control signals for applying set voltages to unselected blocks. This multi-functionality reduces the need for separate dedicated circuits for each function.
Solution Approach 2:
The patent merges the voltage control functionality into the existing block decoder structure. The control logic circuit integrates the hole removal function with the block selection logic, combining multiple control functions into a unified control mechanism that operates during normal decode operations.
3Productivity
If holes are not removed from unselected memory blocks, then device complexity remains low, but program verify operations experience degraded performance due to residual holes in the channel
Solution Approach 1:
The patent applies the set voltage to unselected memory blocks before or during the program verify operation to preemptively remove holes from their channels. This preliminary action ensures that when verify operations occur, the unselected blocks are already in a clean state, preventing performance degradation.
Data Source
AI summary
Provided is a semiconductor memory device and a method of operating the same. The semiconductor memory device may include a memory unit including a plurality of memory blocks; a voltage supply circuit configured to generate a plurality of operating voltages and output the generated operating voltages to at least two global line groups during a program operation on the memory unit; a pass circuit configured to couple word lines of the memory blocks to the at least two global line groups; and a control logic configured to control the voltage supply circuit and the pass circuit such that during a program verify operation of the program operation, a program verify voltage is applied to a selected memory block of the memory blocks, and a set voltage is applied to a share memory block sharing with the selected memory block among unselected memory blocks.