Memory Architecture Voltage Control for Leakage Reduction
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Solution Overview
Problem
In memory architectures, the ratio of current Ion to Ioff affects memory density, with lower ratios reducing the number of memory cells that can be coupled with a bit line, thereby decreasing memory density.
Innovation Solution
Configuring supply voltage values for accessed and un-accessed memory cells during write and read operations to minimize leakage current, with lower supply voltage for accessed rows and higher reference voltage for un-accessed rows, allowing more memory cells to be coupled with a bit line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the ratio of current Ion to Ioff is increased to increase memory density, then more memory cells can be coupled with a bit line, but leakage current Ioff of un-accessed memory cells increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the supply voltage to different rows based on their access state. Accessed rows receive a first supply voltage that enables strong drive current Ion, while unaccessed rows receive a second supply voltage that minimizes leakage current Ioff. This differential voltage approach resolves the contradiction by allowing high Ion/Ioff ratio without excessive leakage from unaccessed cells.
Solution Approach 2:
The patent implements local quality by providing different supply voltage levels to different rows of memory cells based on their individual access status. Instead of uniform voltage distribution, the system tailors the electrical characteristics locally to each row's operational state, enabling accessed rows to operate with optimal drive strength while unaccessed rows maintain minimal leakage.
2Object-generated harmful factors
If supply voltage is increased to reduce leakage current, then leakage current is minimized, but power consumption increases
Solution Approach 1:
The patent resolves this contradiction by dynamically changing the supply voltage parameter based on operational requirements. During read operations, unaccessed rows are placed in low-power mode with reduced supply voltage to minimize leakage. During write operations, the same rows can be switched to higher voltage if needed. This time-varying parameter adjustment achieves low leakage without permanent high power consumption.
Solution Approach 2:
The system employs dynamics by making the supply voltage adjustable and time-dependent rather than fixed. The voltage level for each row changes according to whether the row is accessed or unaccessed at any given moment. This dynamic voltage scaling allows the system to adapt power consumption and leakage current levels to actual operational needs.
Data Source
AI summary
A memory device includes control line drivers coupled to respective pairs of reference supply voltage controllers and supply voltage controllers. The control line drivers are configured to apply control signals to the reference supply voltage controllers and the supply voltage controllers. For a read operation, the reference supply voltage controllers apply a first voltage to reference voltage supply nodes of un-accessed rows of the array of memory cells and a second voltage to accessed rows. A voltage level of the first voltage is greater than a voltage level of the second voltage. For a write operation, the supply voltage controllers apply a third voltage to un-accessed rows of the array of memory cells and a fourth voltage to accessed rows. A voltage level of the third voltage is greater than a voltage level of the fourth voltage.